Skip to content

Commit 82f566b

Browse files
SoftwareArchitektSoftwareArchitekt
committed
boards: adding ch32v307evt from scdz
adding from scdz the ch32v307evt-board, it is build on a ch32v307vc-soc which have a risc-v qingKeV4F-Core Signed-off-by: Thomas Boje <info@andocs.biz>
1 parent 194fe10 commit 82f566b

File tree

11 files changed

+253
-0
lines changed

11 files changed

+253
-0
lines changed

‎boards/scdz/ch32v307evt/Kconfig.ch32v307evt

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# Copyright (c) 2025 Thomas Boje
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config BOARD_CH32V307EVT
5+
select SOC_CH32V307

‎boards/scdz/ch32v307evt/board.cmake

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Copyright (c) 2024 Michael Hope
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
board_runner_args(minichlink "--dt-flash=y")
5+
include(${ZEPHYR_BASE}/boards/common/minichlink.board.cmake)
6+
7+
board_runner_args(openocd "--use-elf" "--cmd-reset-halt" "halt")
8+
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

‎boards/scdz/ch32v307evt/board.yml

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
board:
2+
name: ch32v307evt
3+
full_name: SCDZ_CH32V307EVT
4+
vendor: scdz
5+
socs:
6+
- name: ch32v307

‎boards/scdz/ch32v307evt/ch32v307evt-pinctrl.dtsi

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
/*
2+
* Copyright (c) 2025 Thomas Boje
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
#include <zephyr/dt-bindings/pinctrl/ch32v20x_30x-pinctrl.h>
7+
8+
&pinctrl {
9+
usart1_default: usart1_default {
10+
group1 {
11+
pinmux = <USART1_TX_PA9_0>;
12+
output-high;
13+
drive-push-pull;
14+
slew-rate = "max-speed-10mhz";
15+
};
16+
17+
group2 {
18+
pinmux = <USART1_RX_PA10_0>;
19+
bias-pull-up;
20+
};
21+
};
22+
};

‎boards/scdz/ch32v307evt/ch32v307evt.dts

Lines changed: 82 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,82 @@
1+
/*
2+
* Copyright (c) 2025 Thomas Boje
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
/dts-v1/;
7+
8+
#include <wch/ch32v307/ch32v307vc.dtsi>
9+
#include <zephyr/dt-bindings/gpio/gpio.h>
10+
#include <zephyr/dt-bindings/input/input-event-codes.h>
11+
#include "ch32v307evt-pinctrl.dtsi"
12+
13+
/ {
14+
model = "scdz_ch32v307evt";
15+
compatible = "scdz,ch32v307";
16+
17+
chosen {
18+
zephyr,sram = &sram0;
19+
zephyr,flash = &flash0;
20+
zephyr,console = &usart1;
21+
zephyr,shell-uart = &usart1;
22+
};
23+
24+
leds {
25+
compatible = "gpio-leds";
26+
27+
/*
28+
* Please connect the unconnected LED1 on the SCDZ CH32V307EVT
29+
* board to a suitable GPIO pin (like PD1) and then change
30+
* this status to "okay".
31+
*/
32+
status = "disabled";
33+
34+
red_led: led0 {
35+
gpios = <&gpiod 1 GPIO_ACTIVE_LOW>;
36+
};
37+
};
38+
buttons {
39+
compatible = "gpio-keys";
40+
41+
user_button0: sw0 {
42+
label = "User SW0";
43+
gpios = <&gpioa 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
44+
zephyr,code = <INPUT_KEY_0>;
45+
};
46+
};
47+
48+
aliases {
49+
led0 = &red_led;
50+
sw0 = &user_button0;
51+
};
52+
};
53+
54+
&clk_hse {
55+
clock-frequency = <DT_FREQ_M(32)>;
56+
status = "okay";
57+
};
58+
59+
&pll {
60+
clocks = <&clk_hse>;
61+
status = "okay";
62+
};
63+
64+
&rcc {
65+
clocks = <&pll>;
66+
};
67+
68+
69+
&gpioa {
70+
status = "okay";
71+
};
72+
73+
&gpioc {
74+
status = "okay";
75+
};
76+
77+
&usart1 {
78+
status = "okay";
79+
current-speed = <115200>;
80+
pinctrl-0 = <&usart1_default>;
81+
pinctrl-names = "default";
82+
};

‎boards/scdz/ch32v307evt/ch32v307evt.yaml

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
identifier: scdz_ch32v307evt
2+
name: SCDZ CH32V307 Evaluation Board
3+
type: mcu
4+
arch: riscv
5+
toolchain:
6+
- cross-compile
7+
- zephyr
8+
ram: 32
9+
flash: 256
10+
supported:
11+
- gpio
12+
- i2c

‎boards/scdz/ch32v307evt/ch32v307evt_defconfig

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Copyright (c) 2025 Thomas Boje
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
CONFIG_GPIO=y
5+
6+
CONFIG_SERIAL=y
7+
CONFIG_CONSOLE=y
8+
CONFIG_UART_CONSOLE=y

‎boards/scdz/ch32v307evt/doc/img/ch32v003evt.webp

49.9 KB
Binary file not shown.

‎boards/scdz/ch32v307evt/doc/index.rst

Lines changed: 82 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,82 @@
1+
.. zephyr:board:: ch32v307evt
2+
3+
Overview
4+
********
5+
6+
The `SCDZ`_ CH32V307EVT hardware provides support for QingKe V4F 32-bit RISC-V
7+
processor.
8+
9+
The `WCH webpage on CH32V307`_ contains
10+
the processor's information and the datasheet.
11+
12+
Hardware
13+
********
14+
15+
The QingKe V4F 32-bit RISC-V processor of the SCDZ CH32V307EVT is clocked by an external
16+
32 MHz crystal or the internal 8 MHz oscillator and runs with 127 MHz.
17+
The CH32V307 SoC features 8 USART, 5 GPIO banks, 3 SPI, 2 I2C, 2 ADC, RTC,
18+
2 CAN, USB Host/Device, Ethernet and 4 OPA.
19+
20+
Supported Features
21+
==================
22+
- GPIO
23+
- USART
24+
25+
Connections and IOs
26+
===================
27+
28+
LED
29+
---
30+
31+
* LED1 = Unconnected. Connect to an I/O pin (PD0).
32+
* LED2 = Unconnected. Connect to an I/O pin (PD1).
33+
34+
BUTTON
35+
------
36+
37+
* USER0 = Unconnected. Connect to an I/O pinn (PC0).
38+
39+
.. zephyr:board-supported-hw::
40+
41+
Programming and Debugging
42+
*************************
43+
44+
Applications for the ``ch32v307evt`` board target can be built and flashed
45+
in the usual way (see :ref:`build_an_application` and :ref:`application_run`
46+
for more details); however, an external programmer (like the `WCH LinkE`_) is required since the board
47+
does not have any built-in debug support.
48+
49+
The following pins of the external programmer must be connected to the
50+
following pins on the PCB (best way is to use a ribbon cable):
51+
52+
* VCC = VCC (do not power the board from the USB port at the same time)
53+
* GND = GND
54+
* SWIO = PA13
55+
56+
Flashing
57+
========
58+
59+
You can use ``minichlink`` to flash the board. Once ``minichlink`` has been set
60+
up, build and flash applications as usual (see :ref:`build_an_application` and
61+
:ref:`application_run` for more details).
62+
63+
Here is an example for the :zephyr:code-sample:`hello_world` application.
64+
65+
.. zephyr-app-commands::
66+
:zephyr-app: samples/hello_world
67+
:board: ch32v307evt
68+
:goals: build flash
69+
70+
Debugging
71+
=========
72+
73+
This board can be debugged via OpenOCD using the WCH openOCD liberated fork, available at https://github.com/jnk0le/openocd-wch.
74+
75+
References
76+
**********
77+
78+
.. target-notes::
79+
80+
.. _WCH: http://www.wch-ic.com
81+
.. _WCH webpage on CH32V307: https://www.wch-ic.com/products/CH32V307.html
82+
.. _WCH LinkE: https://www.wch-ic.com/products/WCH-Link.html

‎boards/scdz/ch32v307evt/support/openocd.cfg

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
#interface wlink
2+
adapter driver wlinke
3+
adapter speed 6000
4+
transport select sdi
5+
6+
wlink_set_address 0x00000000
7+
set _CHIPNAME wch_riscv
8+
sdi newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
9+
10+
set _TARGETNAME $_CHIPNAME.cpu
11+
12+
target create $_TARGETNAME.0 wch_riscv -chain-position $_TARGETNAME
13+
$_TARGETNAME.0 configure -work-area-phys 0x20000000 -work-area-size 10000 -work-area-backup 1
14+
set _FLASHNAME $_CHIPNAME.flash
15+
16+
flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
17+
18+
echo "Ready for Remote Connections"

0 commit comments

Comments
 (0)