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boards: renesas: Add minimal support for Renesas RZ/G2UL-SMARC
Add minimal support for board Renesas RZ/G2UL-SMARC Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com> Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
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‎boards/renesas/rzg2ul_smarc/Kconfig.rzg2ul_smarc

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_RZG2UL_SMARC
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select SOC_R9A07G043U11GBG

‎boards/renesas/rzg2ul_smarc/board.cmake

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=R9A07G043U11")
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/renesas/rzg2ul_smarc/board.yml

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board:
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name: rzg2ul_smarc
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full_name: RZ/G2UL SMARC Evaluation Board Kit
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vendor: renesas
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socs:
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- name: r9a07g043u11gbg

‎boards/renesas/rzg2ul_smarc/doc/index.rst

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.. zephyr:board:: rzg2ul_smarc
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Overview
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********
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The Renesas RZ/G2UL SMARC Evaluation Board Kit (RZ/G2UL-EVKIT) consists of a SMARC v2.1 module board and a carrier board.
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* Device: RZ/G2UL (Type-1) R9A07G043U11GBG
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* Cortex-A55 Single, Cortex-M33
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* BGA361pin, 13mmSq body, 0.5mm pitch
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* SMARC v2.1 Module Board Functions
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* DDR4 SDRAM: 1GB x 1pc
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* QSPI flash memory: 128Mb x 1pc `AT25QL128A <https://www.renesas.com/en/products/memory-logic/non-volatile-memory/spi-nor-flash/at25ql128a-128mbit-17v-minimum-spi-serial-flash-memory-dual-io-quad-io-and-qpi-support>`_
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* eMMC memory: 64GB x 1pc
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* The microSD card slot is implemented and used as an eSD for boot
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* 5-output clock oscillator `5P35023 <https://www.renesas.com/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3s-programmable-clock-generator>`_ implemented
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* PMIC power supply `DA9062 <https://www.renesas.com/en/products/power-management/multi-channel-power-management-ics-pmics/da9062-pmic-designed-applications-requiring-85a>`_ implemented
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* Carrier Board Functions
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* The FFC/FPC connector is mounted as standard for connection to high-speed serial interface for camera module.
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* The Micro-HDMI connector via DSI/HDMI conversion module is mounted as standard for connection to high-speed serial interface for digital video module.
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* The Micro-AB receptacle (ch0: USB2.0 OTG) and A receptacle (ch1: USB2.0 Host) are respectively mounted as standard for connection to USB interface.
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* The RJ45 connector is mounted as standard for software development and evaluation using Ethernet.
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* The audio codec is mounted as standard for advance development of audio system. The audio jack is implemented for connection to audio interface.
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* The Micro-AB receptacles are implemented for connection to asynchronous serial port interface.
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* The microSD card slot and two sockets for PMOD are implemented as an interface for peripheral functions.
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* For power supply, a mounted USB Type-C receptacle supports the USB PD standard.
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Hardware
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********
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The Renesas RZ/G2UL MPU documentation can be found at `RZ/G2UL Group Website`_
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.. figure:: rzg2ul_block_diagram.webp
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:width: 600px
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:align: center
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:alt: RZ/G2UL group feature
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RZ/G2UL block diagram (Credit: Renesas Electronics Corporation)
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Programming and Debugging
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*************************
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Applications for the ``rzg2ul_smarc`` board can be built in the usual way as
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documented in :ref:`build_an_application`.
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Console
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=======
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By default, `J-Link RTT Viewer`_ is used by Zephyr running on CM33 for providing serial console.
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The only serial port (SER3_UART micro-USB) is reserved for CA55 to run Linux.
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.. note::
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Set SW1-1 on the board to "OFF" to select JTAG debug mode, which is required for
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RTT to work.
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There are two ways to use the RTT Viewer on this board. The basic steps for each method are
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described below:
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1. Using with Ozone
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-------------------
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After the Zephyr application has been built successfully, open J-Link RTT Viewer and configure the
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connection as follows:
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- **Connect to J-Link**: Existing Session (enable Auto Reconnect)
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- **RTT Control Block**: Auto Detection
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- Click **OK**
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Next, open `Ozone Debugger`_ and choose "Create New Project". Inside the "New Project Wizard"
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configure the settings as follows:
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- **Device**: R9A07G043U11
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- **Register Set**: Cortex-M33
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- Click **Next**
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- **Target Interface**: SWD
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- **Target Interface Speed**: 4MHz
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- **Host Interface**: USB
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- Click **Next**
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- Set the full path of ``zephyr.elf`` file. The path should resemble ``zephyrproject/zephyr/build/zephyr/zephyr.elf``
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- Click **Next**, leave all options by default, and click **Finish**
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- Press **F5** to download and reset program
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2. Using with U-Boot
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--------------------
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After the Zephyr application has been built successfully, open the ``zephyr.map`` file located in
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``zephyrproject\zephyr\build\zephyr\zephyr.map``. Locate the symbol ``_SEGGER_RTT`` and copy its
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address value in hexadecimal.
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Then, perform the "Flashing" steps described below to run the Zephyr application using U-Boot. As soon as the
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application is invoked, open J-Link RTT Viewer and configure the connection as follows:
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- **Connect to J-Link**: USB
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- **Specify Target Device**: R9A07G043U11 (enable Force go on connect)
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- **Target Interface & Speed**: SWD @ 4000 kHz
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- **RTT Control Block**: Select "Address", then paste the address of the ``_SEGGER_RTT`` symbol copied earlier.
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- Click **OK**
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.. note::
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When using RTT Viewer with a Zephyr application launched by U-Boot, it is important to connect
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the RTT Viewer immediately after executing the U-Boot command sequence. This helps avoid losing
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early log output.
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Debugging
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=========
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It is possible to load and execute a Zephyr application binary on
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this board on the Cortex-M33 System Core from
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the internal SRAM, using ``JLink`` debugger (:ref:`jlink-debug-host-tools`).
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Here is an example for building and debugging with the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: rzg2ul_smarc/r9a07g043u11gbg/cm33
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:goals: build debug
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Flashing
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========
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RZ/G2UL-EVKIT is designed to start different systems on different cores.
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It uses Yocto as the build system to build Linux system and boot loaders
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to run Zephyr on Cortex-M33 with u-boot. The minimal steps are described below.
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1. Follow "2.2 Building Images" of `SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide`_ to prepare the build environment.
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2. At step (4), follow step "2. Download Multi-OS Package" and "3. Add the layer for Multi-OS Package"
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of "3.2 OpenAMP related stuff Integration for RZ/G2L, RZ/G2LC and RZ/G2UL" of `Release Note for RZ/G Multi-OS Package V2.2.0`_
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to add the layer for Multi-OS Package.
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.. code-block:: console
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$ cd ~/rzg_vlp_<pkg ver>
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$ unzip <Multi-OS Dir>/r01an5869ej0220-rzg-multi-os-pkg.zip
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$ tar zxvf r01an5869ej0220-rzg-multi-os-pkg/meta-rz-features_multi-os_v2.2.0.tar.gz
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$ bitbake-layers add-layer ../meta-rz-features/meta-rz-multi-os/meta-rzg2l
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3. Start the build:
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.. code-block:: console
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$ MACHINE=smarc-rzg2ul bitbake core-image-minimal
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The below necessary artifacts will be located in the build/tmp/deploy/images
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+---------------+------------------------------------------------------+
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| Artifacts | File name |
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+===============+======================================================+
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| Boot loader | bl2_bp-smarc-rzg2ul.srec |
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| | |
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| | fip-smarc-rzg2ul.srec |
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+---------------+------------------------------------------------------+
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| Flash Writer | Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot |
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+---------------+------------------------------------------------------+
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4. Follow "4.2 Startup Procedure" of `SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide`_ for power supply and board setting
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at SCIF download (SW11[1:4] = OFF, ON, OFF, ON) and (SW1[1:3] = ON, OFF, OFF)
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5. Follow "4.3 Download Flash Writer to RAM" of `SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide`_ to download Flash Writer to RAM
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6. Follow "4.4 Write the Bootloader" of `SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide`_ to write the boot loader
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to the target board by using Flash Writer.
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7. Follow "4.5 Change Back to Normal Boot Mode" with switch setting (SW11[1:4] = OFF, OFF, OFF, ON) and (SW1[1:2] = ON, OFF)
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8. Follow "3. Preparing the SD Card" of `SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide`_ to write files to the microSD Card
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9. Copy zephyr.bin file to microSD card
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10. Follow "4.4.2 CM33 Sample Program Invocation with u-boot" from the beginning to step 4 of `Release Note for RZ/G Multi-OS Package V2.2.0`_
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11. Execute the commands stated below on the console to start zephyr application with CM33 core.
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Here, "N" stands for the partition number in which you stored zephyr.bin file.
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.. code-block:: console
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Hit any key to stop autoboot: 2
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=> dcache off
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=> mmc dev 1
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=> fatload mmc 1:N 0x00010000 zephyr.bin
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=> fatload mmc 1:N 0x40010000 zephyr.bin
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=> cm33 start_normal 0x00010000 0x40010000
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=> dcache on
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Troubleshooting
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===============
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By default, the only valid serial port (SER3_UART micro-USB port) controlled by SCIF0 is used by Linux to
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print Linux console output. Therefore, in order to use it from Zephyr, the Linux console must first be disabled.
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To do this, run the following command in the Linux console to unbind the SCIF0 driver:
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.. code-block:: console
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$ echo 1004b800.serial | tee /sys/bus/platform/drivers/sh-sci/unbind
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This allows the SCIF0 to be accessed from the Zephyr side in debug mode for providing serial console.
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Please note that the SCIF0 driver is disabled by default on the Zephyr side to prevent conflicts.
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References
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**********
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.. target-notes::
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.. _RZ/G2UL Group Website:
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https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzg2ul-general-purpose-microprocessors-single-core-arm-cortex-a55-10ghz-cpu-and-single-core-arm-cortex-m33
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.. _RZG2UL-EVKIT Website:
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https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzg2ul-evkit-evaluation-board-kit-rzg2ul-mpu
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.. _SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide:
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https://www.renesas.com/en/document/gde/smarc-evk-rzg2l-rzg2lc-rzg2ul-linux-start-guide-rev106
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.. _Release Note for RZ/G Multi-OS Package V2.2.0:
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https://www.renesas.com/en/document/rln/release-note-rzg-multi-os-package-v220?r=1522841
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.. _J-Link RTT Viewer:
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https://www.segger.com/products/debug-probes/j-link/tools/rtt-viewer
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.. _Ozone Debugger:
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https://www.segger.com/products/development-tools/ozone-j-link-debugger/

‎boards/renesas/rzg2ul_smarc/doc/rzg2ul_block_diagram.webp

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‎boards/renesas/rzg2ul_smarc/doc/rzg2ul_smarc.webp

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‎boards/renesas/rzg2ul_smarc/rzg2ul_smarc_r9a07g043u11gbg_cm33.dts

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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include <arm/renesas/rz/rzg/r9a07g043.dtsi>
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#include "rzg2ul_smarc-pinctrl.dtsi"
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/ {
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model = "Renesas RZ/G2UL SMARC";
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compatible = "renesas,rzg2ul-smarc";
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chosen {
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zephyr,sram = &ddr;
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};
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ddr: memory@60010000 {
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compatible = "mmio-sram";
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reg = <0x60010000 DT_SIZE_M(46)>;
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};
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};

‎boards/renesas/rzg2ul_smarc/rzg2ul_smarc_r9a07g043u11gbg_cm33.yaml

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identifier: rzg2ul_smarc/r9a07g043u11gbg/cm33
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name: Cortex-M33 for Renesas RZ/G2UL SMARC
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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supported:
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- uart
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- gpio

‎boards/renesas/rzg2ul_smarc/rzg2ul_smarc_r9a07g043u11gbg_cm33_defconfig

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_XIP=n
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# Enable console
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CONFIG_CONSOLE=y
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# Segger RTT
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CONFIG_RTT_CONSOLE=y
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CONFIG_USE_SEGGER_RTT=y

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