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ayla-nordicsemikartben
ayla-nordicsemi
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boards: nordic: add 'iron' board variant to application
- Add support of next generation secure firmware to nrf92 application core. Signed-off-by: Aymen LAOUINI <aymen.laouini@nordicsemi.no>
1 parent dab414f commit 7ec82ad

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-3
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‎boards/nordic/nrf9280pdk/Kconfig.defconfig

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default n if ZTEST
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endif # BOARD_NRF9280PDK_NRF9280_CPUPPR
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if BOARD_NRF9280PDK_NRF9280_CPUAPP_IRON
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config ROM_START_OFFSET
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default 0x800 if BOOTLOADER_MCUBOOT
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config FLASH_LOAD_OFFSET
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default $(dt_nodelabel_reg_addr_hex,cpuapp_boot_partition) if !USE_DT_CODE_PARTITION
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endif # BOARD_NRF9280PDK_NRF9280_CPUAPP_IRON

‎boards/nordic/nrf9280pdk/Kconfig.nrf9280pdk

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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NRF9280PDK
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select SOC_NRF9280_CPUAPP if BOARD_NRF9280PDK_NRF9280_CPUAPP
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select SOC_NRF9280_CPUAPP if (BOARD_NRF9280PDK_NRF9280_CPUAPP || \
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BOARD_NRF9280PDK_NRF9280_CPUAPP_IRON)
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select SOC_NRF9280_CPURAD if BOARD_NRF9280PDK_NRF9280_CPURAD
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select SOC_NRF9280_CPUPPR if BOARD_NRF9280PDK_NRF9280_CPUPPR || \
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BOARD_NRF9280PDK_NRF9280_CPUPPR_XIP
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select SOC_NRF9280_CPUPPR if (BOARD_NRF9280PDK_NRF9280_CPUPPR || \
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BOARD_NRF9280PDK_NRF9280_CPUPPR_XIP)
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select SOC_NRF9280_IRON if BOARD_NRF9280PDK_NRF9280_CPUAPP_IRON

‎boards/nordic/nrf9280pdk/board.yml

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variants:
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- name: xip
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cpucluster: cpuppr
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- name: iron
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cpucluster: cpuapp

‎boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-ipc_conf_iron.dtsi

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* This file is to be merged with the original ipc_conf.dtsi in the future. */
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/ {
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ipc {
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/delete-node/ ipc-1-2;
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/delete-node/ ipc-1-3;
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cpusec_cpuapp_ipc: ipc-1-2 {
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compatible = "nordic,ironside-call";
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memory-region = <&cpusec_cpuapp_ipc_shm>;
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mboxes = <&cpusec_bellboard 12>,
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<&cpuapp_bellboard 0>;
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status = "disabled";
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};
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cpusec_cpurad_ipc: ipc-1-3 {
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compatible = "nordic,ironside-call";
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memory-region = <&cpusec_cpurad_ipc_shm>;
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mboxes = <&cpusec_bellboard 18>,
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<&cpurad_bellboard 0>;
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status = "disabled";
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};
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};
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};

‎boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-memory_map_iron.dtsi

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* This file is to be merged with the original memory_map.dtsi in the future.
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* The following nodes will be replaced:
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*/
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/delete-node/ &cpuapp_cpusys_ipc_shm;
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/delete-node/ &cpusec_cpuapp_ipc_shm;
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/delete-node/ &cpusys_cpuapp_ipc_shm;
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/delete-node/ &cpuapp_rw_partitions;
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/delete-node/ &cpuapp_rx_partitions;
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/delete-node/ &cpurad_rx_partitions;
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/ {
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reserved-memory {
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cpuapp_cpusys_ipc_shm: memory@2f88f600 {
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reg = <0x2f88f600 0x80>;
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};
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cpusys_cpuapp_ipc_shm: memory@2f88f680 {
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reg = <0x2f88f680 0x80>;
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};
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cpusec_cpuapp_ipc_shm: memory@2f88fb80 {
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reg = <0x2f88fb80 0x80>;
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};
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cpuapp_ironside_se_event_report: memory@2f88fc00 {
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reg = <0x2f88fc00 0x100>;
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};
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cpuapp_ironside_se_boot_report: memory@2f88fd00 {
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reg = <0x2f88fd00 0x200>;
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};
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};
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};
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&mram1x {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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cpuapp_boot_partition: partition@312000 {
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reg = <0x312000 DT_SIZE_K(64)>;
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};
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cpuapp_slot0_partition: partition@322000 {
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reg = <0x322000 DT_SIZE_K(336)>;
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};
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cpuapp_slot1_partition: partition@376000 {
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reg = <0x376000 DT_SIZE_K(440)>;
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};
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cpuppr_code_partition: partition@3E4000 {
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reg = <0x3E4000 DT_SIZE_K(64)>;
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};
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cpuflpr_code_partition: partition@3F4000 {
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reg = <0x3F4000 DT_SIZE_K(48)>;
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};
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cpurad_slot0_partition: partition@400000 {
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reg = <0x400000 DT_SIZE_K(336)>;
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};
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cpurad_slot1_partition: partition@454000 {
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reg = <0x454000 DT_SIZE_K(336)>;
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};
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storage_partition: partition@600000 {
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reg = <0x600000 DT_SIZE_K(40)>;
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};
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};
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};

‎boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp_iron.dts

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "nrf9280pdk_nrf9280_cpuapp.dts"
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#include "nrf9280pdk_nrf9280-ipc_conf_iron.dtsi"
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#include "nrf9280pdk_nrf9280-memory_map_iron.dtsi"
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/delete-node/ &cpusec_cpurad_ipc;
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/ {
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chosen {
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zephyr,code-partition = &slot0_partition;
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zephyr,uart-mcumgr = &uart136;
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};
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};
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&cpusec_bellboard {
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status = "okay";
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};
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&cpusec_cpuapp_ipc {
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mbox-names = "tx", "rx";
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status = "okay";
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};
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ironside_se_boot_report: &cpuapp_ironside_se_boot_report {};
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boot_partition: &cpuapp_boot_partition {
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label = "mcuboot";
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};
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slot0_partition: &cpuapp_slot0_partition {
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label = "image-0";
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};
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slot1_partition: &cpuapp_slot1_partition {
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label = "image-1";
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};

‎boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp_iron.yaml

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# Copyright (c) 2025 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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identifier: nrf9280pdk/nrf9280/cpuapp/iron
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name: nRF9280-DK-nRF9280-Application
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type: mcu
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arch: arm
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toolchain:
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- gnuarmemb
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- xtools
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- zephyr
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sysbuild: true
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ram: 512
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flash: 1024
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supported:
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- adc
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- counter
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- gpio
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- i2c
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- pwm
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- spi
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- watchdog
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- usbd

‎boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp_iron_defconfig

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# Copyright (c) 2025 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# Enable UART driver
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CONFIG_SERIAL=y
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable hardware stack protection
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CONFIG_HW_STACK_PROTECTION=y
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# MPU-based null-pointer dereferencing detection cannot be applied
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# as the (0x0 - 0x400) region is unmapped for this target.
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CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
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# Enable cache
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CONFIG_CACHE_MANAGEMENT=y
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CONFIG_EXTERNAL_CACHE=y
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# Enable GPIO
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CONFIG_GPIO=y
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# UICR generation is not supported, and when reintroduced will not use nrf-regtool.
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CONFIG_NRF_REGTOOL_GENERATE_UICR=n

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