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boards: adi: Add AD_SWIOT1L_SL board
This commit adds AD_SWIOT1L_SL board basic port. Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
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# AD-SWIOT1L-SL board configuration
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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_AD_SWIOT1L_SL
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select SOC_MAX32650
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/*
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* Copyright (c) 2025 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <adi/max32/max32650.dtsi>
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#include <adi/max32/max32650-pinctrl.dtsi>
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#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "Analog Devices AD-SWIOT1L-SL";
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compatible = "adi,ad_swiot1l_sl";
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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leds {
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compatible = "gpio-leds";
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led1: led_1 {
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gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
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label = "Red LED";
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};
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led2: led_2 {
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gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
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label = "Green LED";
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};
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};
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/* These aliases are provided for compatibility with samples */
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aliases {
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led0 = &led1;
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led1 = &led2;
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};
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};
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&uart0 {
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pinctrl-0 = <&uart0_tx_p2_12 &uart0_rx_p2_11>;
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pinctrl-names = "default";
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current-speed = <115200>;
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data-bits = <8>;
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parity = "none";
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status = "okay";
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};
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&clk_ipo {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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identifier: ad_swiot1l_sl
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name: ad_swiot1l_sl
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vendor: adi
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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supported:
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- gpio
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- serial
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ram: 1024
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flash: 3072
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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable GPIO
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CONFIG_GPIO=y
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# Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable UART
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y

boards/adi/ad_swiot1l_sl/board.cmake

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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=MAX32650" "--reset-after-load")
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include(${ZEPHYR_BASE}/boards/common/openocd-adi-max32.boards.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/adi/ad_swiot1l_sl/board.yml

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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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board:
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name: ad_swiot1l_sl
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full_name: AD-SWIOT1L-SL
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vendor: adi
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socs:
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- name: max32650
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.. zephyr:board:: ad_swiot1l_sl
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Overview
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********
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The AD-SWIOT1L-SL is a complete hardware and software platform for prototyping intelligent,
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secure, network-capable field devices, with applications in factory automation, process
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control, and intelligent buildings.
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The Zephyr port is running on the MAX32650 MCU.
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.. image:: img/ad_swiot1l_sl.webp
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:align: center
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:alt: AD-SWIOT1L-SL Front
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Hardware
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********
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- MAX32650 MCU:
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- Ultra-Efficient Microcontroller for Battery-Powered Applications
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- 120MHz Arm Cortex-M4 Processor with FPU
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- SmartDMA Provides Background Memory Transfers with Programmable Data Processing
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- 120MHz High-Speed and 50MHz Low-Power Oscillators
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- 7.3728MHz Low-Power Oscillators
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- 32.768kHz and RTC Clock (Requires External Crystal)
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- 8kHz, Always-On, Ultra-Low-Power Oscillator
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- 3MB Internal Flash, 1MB Internal SRAM
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- 104μW/MHz Executing from Cache at 1.1V
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- Five Low-Power Modes: Active, Sleep, Background, Deep Sleep, and Backup
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- 1.8V and 3.3V I/O with No Level Translators
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- Scalable Cached External Memory Interfaces:
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- 120MB/s HyperBus/Xccela DDR Interface
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- SPIXF/SPIXR for External Flash/RAM Expansion
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- 240Mbps SDHC/eMMC/SDIO/microSD Interface
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- Optimal Peripheral Mix Provides Platform Scalability
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- 16-Channel DMA
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- Three SPI Master (60MHz)/Slave (48MHz)
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- One QuadSPI Master (60MHz)/Slave (48MHz)
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- Up to Three 4Mbaud UARTs with Flow Control
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- Two 1MHz I2C Master/Slave
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- I2S Slave
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- Four-Channel, 7.8ksps, 10-Bit Delta-Sigma ADC
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- USB 2.0 Hi-Speed Device Interface with PHY
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- 16 Pulse Train Generators
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- Six 32-Bit Timers with 8mA High Drive
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- 1-Wire® Master
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- Trust Protection Unit (TPU) for IP/Data Security
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- Modular Arithmetic Accelerator (MAA), True Random Number Generator (TRNG)
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- Secure Nonvolatile Key Storage, SHA-256, AES-128/192/256
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- Memory Decryption Integrity Unit, Secure Boot ROM
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- External devices connected to the AD-SWIOT1L-SL:
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- On-Board HyperRAM
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- On-Board QSPI Flash
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- MAXQ1065 Ultralow Power Cryptographic Controller with ChipDNA
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- ADIN1110 Robust, Industrial, Low Power 10BASE-T1L Ethernet MAC-PHY
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- 2-Pin external power supply terminal block (24V DC)
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- ADP1032 high performance, isolated micropower management unit (PMU)
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- SWD 10-Pin Header
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- On-Board 3.3V, 1.8V, and 1.1V voltage regulators
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- AD74413R Quad-channel, Software Configurable I/O
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- MAX14906 Quad-channel, Industrial Digital I/O
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- Two general-purpose LEDs
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Supported Features
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==================
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The ``ad_swiot1l_sl`` board supports the following interfaces:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | clock and reset control |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial |
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+-----------+------------+-------------------------------------+
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Programming and Debugging
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*************************
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Flashing
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========
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The MAX32650 MCU can be flashed by connecting an external debug probe to the
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SWD port. SWD debug can be accessed through the Cortex 10-pin connector, J3.
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Logic levels are fixed to VDDIO (1.8V).
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Once the debug probe is connected to your host computer, then you can simply run the
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``west flash`` command to write a firmware image into flash.
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.. note::
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This board uses OpenOCD as the default debug interface. You can also use
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a Segger J-Link with Segger's native tooling by overriding the runner,
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appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
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be connected to the standard 2*5 pin debug connector (J3) using an
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appropriate adapter board and cable
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Debugging
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=========
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Please refer to the `Flashing`_ section and run the ``west debug`` command
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instead of ``west flash``.
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References
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**********
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- `AD-SWIOT1L-SL web page`_
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.. _AD-SWIOT1L-SL web page:
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https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/AD-SWIOT1L-SL.html

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