include: dt-bindings: add headers for RTS5817

Add clock/interrupt/pinctrl/reset dt-bindings headers for RTS5817

Signed-off-by: Darcy Lu <darcy_lu@realsil.com.cn>

Author: RtkFP

include/zephyr/dt-bindings/clock/rts5817_clock.h

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RTS5817_CLOCK_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RTS5817_CLOCK_H_
+
+#define RTS_FP_CLK_SYS_PLL   0
+#define RTS_FP_CLK_BUS       1
+#define RTS_FP_CLK_SPI_CACHE 2
+#define RTS_FP_CLK_SPI_SSOR  3
+#define RTS_FP_CLK_SPI_SSI_M 4
+#define RTS_FP_CLK_SPI_SSI_S 5
+#define RTS_FP_CLK_SHA       6
+#define RTS_FP_CLK_AES       7
+#define RTS_FP_CLK_PKE       8
+#define RTS_FP_CLK_I2C0      9
+#define RTS_FP_CLK_I2C1      10
+#define RTS_FP_CLK_TRNG      11
+#define RTS_FP_CLK_I2C_S     12
+#define RTS_FP_CLK_UART0     13
+#define RTS_FP_CLK_UART1     14
+#define RTS_FP_CLK_SIE       15
+#define RTS_FP_CLK_PUF       16
+#define RTS_FP_CLK_GE        17
+
+#define RLX_CLK_NUM_SIZE (RTS_FP_CLK_GE + 1)
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RTS5817_CLOCK_H_ */

include/zephyr/dt-bindings/interrupt-controller/rts5817_intc.h

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_RTS5817_INTC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_RTS5817_INTC_H_
+
+#define IRQ_NUM_SIE        0
+#define IRQ_NUM_MC         1
+#define IRQ_NUM_SENSOR_SPI 4
+#define IRQ_NUM_SPI_MASTER 5
+#define IRQ_NUM_AES        6
+#define IRQ_NUM_SHA        7
+#define IRQ_NUM_GPIO       11
+#define IRQ_NUM_SP_GPIO    12
+#define IRQ_NUM_UART0      15
+#define IRQ_NUM_UART1      16
+#define IRQ_NUM_SPI_SLAVE  23
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_RTS5817_INTC_H_ */

include/zephyr/dt-bindings/pinctrl/rts5817_pinctrl.h

@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RTS5817_PINCTRL_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RTS5817_PINCTRL_H_
+
+/**
+ * Fields:
+ *
+ * - pin [ 7 : 0 ]
+ * - func [ 10 : 8 ]
+ */
+#define RTS_FP_PIN_SHIFT  0U
+#define RTS_FP_PIN_MASK   0xFFU
+#define RTS_FP_FUNC_SHIFT 8U
+#define RTS_FP_FUNC_MASK  0x1FU
+
+#define RTS_FP_PINMUX(pin, func)                                                                   \
+	((((RTS_FP_PIN_##pin) & RTS_FP_PIN_MASK) << RTS_FP_PIN_SHIFT) |                            \
+	 (((RTS_FP_PIN_##func) & RTS_FP_FUNC_MASK) << RTS_FP_FUNC_SHIFT))
+
+#define RTS_FP_PINMUX_PIN(__pin)  (((__pin) >> RTS_FP_PIN_SHIFT) & RTS_FP_PIN_MASK)
+#define RTS_FP_PINMUX_FUNC(__pin) (((__pin) >> RTS_FP_FUNC_SHIFT) & RTS_FP_FUNC_MASK)
+
+#define IO_POWER_1V8 0
+#define IO_POWER_3V3 1
+
+#define RTS_FP_PIN_FUNC0 0
+#define RTS_FP_PIN_FUNC1 1
+#define RTS_FP_PIN_FUNC2 2
+#define RTS_FP_PIN_FUNC3 3
+#define RTS_FP_PIN_FUNC4 4
+#define RTS_FP_PIN_FUNC5 5
+#define RTS_FP_PIN_FUNC6 6
+#define RTS_FP_PIN_FUNC7 7
+
+#define RTS_FP_PIN_CACHE_CS1  0
+#define RTS_FP_PIN_CACHE_MISO 1
+#define RTS_FP_PIN_CACHE_MOSI 2
+#define RTS_FP_PIN_CACHE_SCK  3
+#define RTS_FP_PIN_CACHE_WP   4
+#define RTS_FP_PIN_CACHE_HOLD 5
+#define RTS_FP_PIN_CACHE_CS2  6
+#define RTS_FP_PIN_SNR_MISO   7
+#define RTS_FP_PIN_SNR_MOSI   8
+#define RTS_FP_PIN_SNR_CLK    9
+#define RTS_FP_PIN_SSI_M_MISO 10
+#define RTS_FP_PIN_SSI_M_MOSI 11
+#define RTS_FP_PIN_SSI_M_CS   12
+#define RTS_FP_PIN_SSI_M_SCK  13
+#define RTS_FP_PIN_SCL0       14
+#define RTS_FP_PIN_SDA0       15
+#define RTS_FP_PIN_SCL2       16
+#define RTS_FP_PIN_SDA2       17
+#define RTS_FP_PIN_SCL1       18
+#define RTS_FP_PIN_SDA1       19
+#define RTS_FP_PIN_SSI_S_MISO 20
+#define RTS_FP_PIN_SSI_S_MOSI 21
+#define RTS_FP_PIN_SSI_S_CS   22
+#define RTS_FP_PIN_SSI_S_SCK  23
+#define RTS_FP_PIN_GPIO14     24
+#define RTS_FP_PIN_GPIO15     25
+#define RTS_FP_PIN_AL0        26
+#define RTS_FP_PIN_AL1        27
+#define RTS_FP_PIN_AL2        28
+#define RTS_FP_PIN_SNR_RST    29
+#define RTS_FP_PIN_SNR_CS     30
+#define RTS_FP_PIN_SNR_GPIO   31
+
+#define P_CACHE_CS2_F_CACHE_CS2 RTS_FP_PINMUX(CACHE_CS2, FUNC0)
+#define P_CACHE_CS2_F_GPIO      RTS_FP_PINMUX(CACHE_CS2, FUNC1)
+
+#define P_SNR_MISO_F_SNR_MISO RTS_FP_PINMUX(SNR_MISO, FUNC0)
+#define P_SNR_MOSI_F_SNR_MOSI RTS_FP_PINMUX(SNR_MOSI, FUNC0)
+#define P_SNR_CLK_F_SNR_CLK   RTS_FP_PINMUX(SNR_CLK, FUNC0)
+
+#define P_SSI_M_MISO_F_GPIO       RTS_FP_PINMUX(SSI_M_MISO, FUNC0)
+#define P_SSI_M_MISO_F_PWM        RTS_FP_PINMUX(SSI_M_MISO, FUNC1)
+#define P_SSI_M_MISO_F_SSI_M_MISO RTS_FP_PINMUX(SSI_M_MISO, FUNC2)
+#define P_SSI_M_MISO_F_SSI_S_MISO RTS_FP_PINMUX(SSI_M_MISO, FUNC3)
+#define P_SSI_M_MISO_F_UART1_RX   RTS_FP_PINMUX(SSI_M_MISO, FUNC4)
+#define P_SSI_M_MISO_F_ASIC_DBG   RTS_FP_PINMUX(SSI_M_MISO, FUNC5)
+
+#define P_SSI_M_MOSI_F_GPIO       RTS_FP_PINMUX(SSI_M_MOSI, FUNC0)
+#define P_SSI_M_MOSI_F_PWM        RTS_FP_PINMUX(SSI_M_MOSI, FUNC1)
+#define P_SSI_M_MOSI_F_SSI_M_MOSI RTS_FP_PINMUX(SSI_M_MOSI, FUNC2)
+#define P_SSI_M_MOSI_F_SSI_S_MOSI RTS_FP_PINMUX(SSI_M_MOSI, FUNC3)
+#define P_SSI_M_MOSI_F_UART1_TX   RTS_FP_PINMUX(SSI_M_MOSI, FUNC4)
+#define P_SSI_M_MOSI_F_ASIC_DBG   RTS_FP_PINMUX(SSI_M_MOSI, FUNC5)
+
+#define P_SSI_M_CS_F_GPIO      RTS_FP_PINMUX(SSI_M_CS, FUNC0)
+#define P_SSI_M_CS_F_PWM       RTS_FP_PINMUX(SSI_M_CS, FUNC1)
+#define P_SSI_M_CS_F_SSI_M_CS  RTS_FP_PINMUX(SSI_M_CS, FUNC2)
+#define P_SSI_M_CS_F_SSI_S_CS  RTS_FP_PINMUX(SSI_M_CS, FUNC3)
+#define P_SSI_M_CS_F_UART1_RTS RTS_FP_PINMUX(SSI_M_CS, FUNC4)
+#define P_SSI_M_CS_F_ASIC_DBG  RTS_FP_PINMUX(SSI_M_CS, FUNC5)
+
+#define P_SSI_M_SCK_F_GPIO      RTS_FP_PINMUX(SSI_M_SCK, FUNC0)
+#define P_SSI_M_SCK_F_PWM       RTS_FP_PINMUX(SSI_M_SCK, FUNC1)
+#define P_SSI_M_SCK_F_SSI_M_CLK RTS_FP_PINMUX(SSI_M_SCK, FUNC2)
+#define P_SSI_M_SCK_F_SSI_S_CLK RTS_FP_PINMUX(SSI_M_SCK, FUNC3)
+#define P_SSI_M_SCK_F_UART1_CTS RTS_FP_PINMUX(SSI_M_SCK, FUNC4)
+#define P_SSI_M_SCK_F_ASIC_DBG  RTS_FP_PINMUX(SSI_M_SCK, FUNC5)
+
+#define P_SCL0_F_GPIO     RTS_FP_PINMUX(SCL0, FUNC0)
+#define P_SCL0_F_PWM      RTS_FP_PINMUX(SCL0, FUNC1)
+#define P_SCL0_F_I2C0_SCL RTS_FP_PINMUX(SCL0, FUNC2)
+#define P_SCL0_F_UART0_RX RTS_FP_PINMUX(SCL0, FUNC3)
+#define P_SCL0_F_SWD_CLK  RTS_FP_PINMUX(SCL0, FUNC4)
+#define P_SCL0_F_ASIC_DBG RTS_FP_PINMUX(SCL0, FUNC5)
+
+#define P_SDA0_F_GPIO     RTS_FP_PINMUX(SDA0, FUNC0)
+#define P_SDA0_F_PWM      RTS_FP_PINMUX(SDA0, FUNC1)
+#define P_SDA0_F_I2C0_SDA RTS_FP_PINMUX(SDA0, FUNC2)
+#define P_SDA0_F_UART0_TX RTS_FP_PINMUX(SDA0, FUNC3)
+#define P_SDA0_F_SWD_DAT  RTS_FP_PINMUX(SDA0, FUNC4)
+#define P_SDA0_F_ASIC_DBG RTS_FP_PINMUX(SDA0, FUNC5)
+
+#define P_SCL2_F_GPIO     RTS_FP_PINMUX(SCL2, FUNC0)
+#define P_SCL2_F_PWM      RTS_FP_PINMUX(SCL2, FUNC1)
+#define P_SCL2_F_I2C2_SCL RTS_FP_PINMUX(SCL2, FUNC2)
+#define P_SCL2_F_UART0_RX RTS_FP_PINMUX(SCL2, FUNC3)
+#define P_SCL2_F_SWD_CLK  RTS_FP_PINMUX(SCL2, FUNC4)
+#define P_SCL2_F_ASIC_DBG RTS_FP_PINMUX(SCL2, FUNC5)
+
+#define P_SDA2_F_GPIO     RTS_FP_PINMUX(SDA2, FUNC0)
+#define P_SDA2_F_PWM      RTS_FP_PINMUX(SDA2, FUNC1)
+#define P_SDA2_F_I2C2_SDA RTS_FP_PINMUX(SDA2, FUNC2)
+#define P_SDA2_F_UART0_TX RTS_FP_PINMUX(SDA2, FUNC3)
+#define P_SDA2_F_SWD_DAT  RTS_FP_PINMUX(SDA2, FUNC4)
+#define P_SDA2_F_ASIC_DBG RTS_FP_PINMUX(SDA2, FUNC5)
+
+#define P_SCL1_F_GPIO     RTS_FP_PINMUX(SCL1, FUNC0)
+#define P_SCL1_F_PWM      RTS_FP_PINMUX(SCL1, FUNC1)
+#define P_SCL1_F_I2C1_SCL RTS_FP_PINMUX(SCL1, FUNC2)
+#define P_SCL1_F_JTAG_TCK RTS_FP_PINMUX(SCL1, FUNC4)
+
+#define P_SDA1_F_GPIO     RTS_FP_PINMUX(SDA1, FUNC0)
+#define P_SDA1_F_PWM      RTS_FP_PINMUX(SDA1, FUNC1)
+#define P_SDA1_F_I2C1_SDA RTS_FP_PINMUX(SDA1, FUNC2)
+#define P_SDA1_F_JTAG_TMS RTS_FP_PINMUX(SDA1, FUNC4)
+
+#define P_SSI_S_MISO_F_GPIO       RTS_FP_PINMUX(SSI_S_MISO, FUNC0)
+#define P_SSI_S_MISO_F_PWM        RTS_FP_PINMUX(SSI_S_MISO, FUNC1)
+#define P_SSI_S_MISO_F_SSI_S_MISO RTS_FP_PINMUX(SSI_S_MISO, FUNC2)
+#define P_SSI_S_MISO_F_UART1_RX   RTS_FP_PINMUX(SSI_S_MISO, FUNC3)
+#define P_SSI_S_MISO_F_JTAG_TDI   RTS_FP_PINMUX(SSI_S_MISO, FUNC4)
+
+#define P_SSI_S_MOSI_F_GPIO       RTS_FP_PINMUX(SSI_S_MOSI, FUNC0)
+#define P_SSI_S_MOSI_F_PWM        RTS_FP_PINMUX(SSI_S_MOSI, FUNC1)
+#define P_SSI_S_MOSI_F_SSI_S_MOSI RTS_FP_PINMUX(SSI_S_MOSI, FUNC2)
+#define P_SSI_S_MOSI_F_UART1_TX   RTS_FP_PINMUX(SSI_S_MOSI, FUNC3)
+#define P_SSI_S_MOSI_F_JTAG_TRST  RTS_FP_PINMUX(SSI_S_MOSI, FUNC4)
+
+#define P_SSI_S_CS_F_GPIO      RTS_FP_PINMUX(SSI_S_CS, FUNC0)
+#define P_SSI_S_CS_F_PWM       RTS_FP_PINMUX(SSI_S_CS, FUNC1)
+#define P_SSI_S_CS_F_SSI_S_CS  RTS_FP_PINMUX(SSI_S_CS, FUNC2)
+#define P_SSI_S_CS_F_UART1_RTS RTS_FP_PINMUX(SSI_S_CS, FUNC3)
+#define P_SSI_S_CS_F_JTAG_TDO  RTS_FP_PINMUX(SSI_S_CS, FUNC4)
+
+#define P_SSI_S_SCK_F_GPIO      RTS_FP_PINMUX(SSI_S_SCK, FUNC0)
+#define P_SSI_S_SCK_F_PWM       RTS_FP_PINMUX(SSI_S_SCK, FUNC1)
+#define P_SSI_S_SCK_F_SSI_S_CLK RTS_FP_PINMUX(SSI_S_SCK, FUNC2)
+#define P_SSI_S_SCK_F_UART1_CTS RTS_FP_PINMUX(SSI_S_SCK, FUNC3)
+
+#define P_GPIO14_F_GPIO     RTS_FP_PINMUX(GPIO14, FUNC0)
+#define P_GPIO14_F_PWM      RTS_FP_PINMUX(GPIO14, FUNC1)
+#define P_GPIO14_F_UART0_RX RTS_FP_PINMUX(GPIO14, FUNC2)
+
+#define P_GPIO15_F_GPIO     RTS_FP_PINMUX(GPIO15, FUNC0)
+#define P_GPIO15_F_PWM      RTS_FP_PINMUX(GPIO15, FUNC1)
+#define P_GPIO15_F_UART0_TX RTS_FP_PINMUX(GPIO15, FUNC2)
+
+#define P_AL0_F_GPIO      RTS_FP_PINMUX(AL0, FUNC0)
+#define P_AL0_F_PWM       RTS_FP_PINMUX(AL0, FUNC1)
+#define P_AL0_F_CS_BRIDGE RTS_FP_PINMUX(AL0, FUNC2)
+
+#define P_AL1_F_GPIO RTS_FP_PINMUX(AL1, FUNC0)
+#define P_AL1_F_PWM  RTS_FP_PINMUX(AL1, FUNC1)
+
+#define P_AL2_F_GPIO RTS_FP_PINMUX(AL2, FUNC0)
+#define P_AL2_F_PWM  RTS_FP_PINMUX(AL2, FUNC1)
+
+#define P_SNR_RST_F_SNR_RST RTS_FP_PINMUX(SNR_RST, FUNC0)
+
+#define P_SNR_CS_F_SNR_CS RTS_FP_PINMUX(SNR_CS, FUNC0)
+#define P_SNR_CS_F_GPIO   RTS_FP_PINMUX(SNR_CS, FUNC1)
+
+#define P_SNR_GPIO_F_GPIO RTS_FP_PINMUX(SNR_GPIO, FUNC0)
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RTS5817_PINCTRL_H_ */

include/zephyr/dt-bindings/reset/rts5817_reset.h

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_RTS5817_RESET_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_RTS5817_RESET_H_
+
+#define SYS_FORCE_RST_BUS       0
+#define SYS_FORCE_RST_AES       1
+#define SYS_FORCE_RST_GE        2
+#define SYS_FORCE_RST_SHA       3
+#define SYS_FORCE_RST_SPI_CACHE 4
+#define SYS_FORCE_RST_SPI_SSOR  5
+#define SYS_FORCE_RST_SPI_SSI_M 6
+#define SYS_FORCE_RST_SPI_SSI_S 7
+#define SYS_FORCE_RST_PKE       8
+#define SYS_FORCE_RST_I2C       9
+#define SYS_FORCE_RST_I2C0      10
+#define SYS_FORCE_RST_I2C1      11
+#define SYS_FORCE_RST_TRNG      12
+#define SYS_FORCE_RST_I2C_S     13
+#define SYS_FORCE_RST_UART0     14
+#define SYS_FORCE_RST_UART1     15
+#define SYS_FORCE_RST_PUF       16
+#define SYS_FORCE_RST_USB2      17
+#define SYS_FORCE_RST_CK30M     18
+#define SYS_FORCE_RST_CK60M     19
+#define SYS_FORCE_RST_CK120M    20
+#define SYS_FORCE_RST_USB2_PHY  21
+#define SYS_FORCE_RST_SYS       22
+#define SYS_FORCE_RST_DPHY      23
+#define SYS_FORCE_RST_SSI_S_BUS 24
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_RESET_RTS5817_RESET_H_ */