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drivers: usb: Add STM32N6 family support to UDC driver
Add STM32N6 family support to UDC driver Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
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drivers/usb/udc/udc_stm32.c

Lines changed: 16 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1061,6 +1061,15 @@ static int priv_clock_enable(void)
10611061
HAL_SYSCFG_SetOTGPHYReferenceClockSelection(SYSCFG_OTG_HS_PHY_CLK_SELECT_1);
10621062
/* Configuring the SYSCFG registers OTG_HS PHY : OTG_HS PHY enable*/
10631063
HAL_SYSCFG_EnableOTGPHY(SYSCFG_OTG_HS_PHY_ENABLE);
1064+
#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_otghs)
1065+
/* Enable Vdd USB voltage monitoring */
1066+
LL_PWR_EnableVddUSBMonitoring();
1067+
while (__HAL_PWR_GET_FLAG(PWR_FLAG_USB33RDY)) {
1068+
/* Wait FOR VDD33USB ready */
1069+
}
1070+
1071+
/* Enable VDDUSB */
1072+
LL_PWR_EnableVddUSB();
10641073
#elif defined(PWR_USBSCR_USB33SV) || defined(PWR_SVMCR_USV)
10651074
/*
10661075
* VDDUSB independent USB supply (PWR clock is on)
@@ -1136,13 +1145,15 @@ static int priv_clock_enable(void)
11361145
/* Both OTG HS and USBPHY sleep clock MUST be disabled here at the same time */
11371146
LL_AHB2_GRP1_DisableClockStopSleep(LL_AHB2_GRP1_PERIPH_OTG_HS ||
11381147
LL_AHB2_GRP1_PERIPH_USBPHY);
1139-
#else
1148+
#elif !DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_otghs)
11401149
LL_AHB1_GRP1_DisableClockLowPower(LL_AHB1_GRP1_PERIPH_OTGHSULPI);
11411150
#endif /* defined(CONFIG_SOC_SERIES_STM32H7X) */
11421151

11431152
#if USB_OTG_HS_EMB_PHY
1153+
#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_otghs)
11441154
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_OTGPHYC);
11451155
#endif
1156+
#endif
11461157
#elif defined(CONFIG_SOC_SERIES_STM32H7X) && DT_HAS_COMPAT_STATUS_OKAY(st_stm32_otgfs)
11471158
/* The USB2 controller only works in FS mode, but the ULPI clock needs
11481159
* to be disabled in sleep mode for it to work.
@@ -1171,9 +1182,11 @@ static int priv_clock_disable(void)
11711182
static struct udc_ep_config ep_cfg_in[DT_INST_PROP(0, num_bidir_endpoints)];
11721183
static struct udc_ep_config ep_cfg_out[DT_INST_PROP(0, num_bidir_endpoints)];
11731184

1185+
#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_otghs)
11741186
PINCTRL_DT_INST_DEFINE(0);
11751187
static const struct pinctrl_dev_config *usb_pcfg =
11761188
PINCTRL_DT_INST_DEV_CONFIG_GET(0);
1189+
#endif
11771190

11781191
#if USB_OTG_HS_ULPI_PHY
11791192
static const struct gpio_dt_spec ulpi_reset =
@@ -1256,11 +1269,13 @@ static int udc_stm32_driver_init0(const struct device *dev)
12561269
IRQ_CONNECT(UDC_STM32_IRQ, UDC_STM32_IRQ_PRI, udc_stm32_irq,
12571270
DEVICE_DT_INST_GET(0), 0);
12581271

1272+
#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_otghs)
12591273
err = pinctrl_apply_state(usb_pcfg, PINCTRL_STATE_DEFAULT);
12601274
if (err < 0) {
12611275
LOG_ERR("USB pinctrl setup failed (%d)", err);
12621276
return err;
12631277
}
1278+
#endif
12641279

12651280
#ifdef SYSCFG_CFGR1_USB_IT_RMP
12661281
/*

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