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boards: nxp: add support for S32K148 evaluation board
Support for NXP S32K148 evaluation board (s32k148_evb). Adapt samples: adc_dt, adc_sequence. Adapt tests: adc_api, gpio_basic_api, gpio_hogs. Signed-off-by: Marcin Wierzbicki <marcin.wierzbicki@accenture.com>
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# Copyright 2023-2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_S32K148_EVB
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if SERIAL
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config UART_CONSOLE
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default y
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endif # SERIAL
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if NETWORKING
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config NET_L2_ETHERNET
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default y if !MODEM
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endif # NETWORKING
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endif # BOARD_S32K148_EVB
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# Copyright 2023-2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_S32K148_EVB
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select SOC_S32K148
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select SOC_PART_NUMBER_FS32K148HAT0MLUT

boards/nxp/s32k148_evb/board.cmake

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# Copyright 2023 NXP
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink
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"--device=S32K148"
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"--speed=4000"
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"--iface=jtag"
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"--reset"
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"--tool-opt=-jtagconf -1,-1"
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)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/nxp/s32k148_evb/board.yml

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board:
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name: s32k148_evb
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full_name: S32K148EVB-Q176
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vendor: nxp
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socs:
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- name: s32k148
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boards/nxp/s32k148_evb/doc/index.rst

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.. zephyr:board:: s32k148_evb
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Overview
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********
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`NXP S32K148-Q176`_ is a low-cost evaluation and development board for general-purpose industrial
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and automotive applications.
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The S32K148-Q176 is based on the 32-bit Arm Cortex-M4F `NXP S32K148`_ microcontroller.
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The onboard OpenSDA serial and debug adapter, running a mass storage device (MSD) bootloader
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and a collection of OpenSDA Applications, offers options for serial communication,
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flash programming, and run-control debugging.
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It is a bridge between a USB host and the embedded target processor.
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Hardware
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********
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- NXP S32K148
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- Arm Cortex-M4F @ up to 112 Mhz
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- 1.5 MB Flash
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- 256 KB SRAM
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- up to 127 I/Os
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- 3x FlexCAN with FD
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- eDMA, 12-bit ADC, MPU, ECC and more.
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- Interfaces
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- CAN, LIN, UART/SCI
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- Ethernet connector compatible with different ethernet daughter cards
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- 2 touchpads, potentiometer, user RGB LED and 2 buttons.
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More information about the hardware and design resources can be found at
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`NXP S32K148-Q176`_ website.
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Connections and IOs
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===================
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This board has 5 GPIO ports named from ``gpioa`` to ``gpioe``.
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Pin control can be further configured from your application overlay by adding
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children nodes with the desired pinmux configuration to the singleton node
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``pinctrl``. Supported properties are described in
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:zephyr_file:`dts/bindings/pinctrl/nxp,port-pinctrl.yaml`.
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LEDs
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----
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The NXP S32K148-Q176 board has one user RGB LED that can be used either as a GPIO
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LED or as a PWM LED.
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.. table:: RGB LED as GPIO LED
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+-----------------+------------------+----------------+-------+
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| Devicetree node | Devicetree alias | Label | Pin |
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+=================+==================+================+=======+
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| led1_red | led0 | LED1_RGB_RED | PTE21 |
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+-----------------+------------------+----------------+-------+
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| led1_green | led1 | LED1_RGB_GREEN | PTE22 |
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+-----------------+------------------+----------------+-------+
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| led1_blue | led2 | LED1_RGB_BLUE | PTE23 |
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+-----------------+------------------+----------------+-------+
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.. table:: RGB LED as PWM LED
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+-----------------+--------------------------+--------------------+------------------+
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| Devicetree node | Devicetree alias | Label | Pin |
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+=================+==========================+====================+==================+
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| led1_red_pwm | pwm-led0 / red-pwm-led | LED1_RGB_RED_PWM | PTE21 / FTM4_CH1 |
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+-----------------+--------------------------+--------------------+------------------+
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| led1_green_pwm | pwm-led1 / green-pwm-led | LED1_RGB_GREEN_PWM | PTE22 / FTM4_CH2 |
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+-----------------+--------------------------+--------------------+------------------+
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| led1_blue_pwm | pwm-led2 / blue-pwm-led | LED1_RGB_BLUE_PWM | PTE23 / FTM4_CH3 |
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+-----------------+--------------------------+--------------------+------------------+
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The user can control the LEDs in any way. An output of ``0`` illuminates the LED.
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Buttons
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-------
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The NXP S32K148-Q176 board has two user buttons:
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+-----------------+-------+-------+
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| Devicetree node | Label | Pin |
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+=================+=======+=======+
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| sw0 / button_3 | SW3 | PTC12 |
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+-----------------+-------+-------+
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| sw1 / button_4 | SW4 | PTC13 |
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+-----------------+-------+-------+
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Serial Console
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==============
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The serial console is provided via ``lpuart1`` on the OpenSDA adapter.
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+------+--------------+
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| Pin | Pin Function |
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+======+==============+
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| PTC7 | LPUART1_TX |
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+------+--------------+
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| PTC6 | LPUART1_RX |
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+------+--------------+
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System Clock
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============
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The Arm Cortex-M4F core is configured to run at 80 MHz (RUN mode).
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Programming and Debugging
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*************************
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.. zephyr:board-supported-runners::
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Applications for the ``s32k148_evb`` board can be built in the usual way as
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documented in :ref:`build_an_application`.
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This board configuration supports `SEGGER J-Link`_ West runner for flashing and
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debugging applications. Follow the steps described in :ref:`jlink-debug-host-tools`,
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to setup the flash and debug host tools for this runner.
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Flashing
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========
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Run the ``west flash`` command to flash the application using SEGGER J-Link.
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Debugging
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=========
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Run the ``west debug`` command to start a GDB session using SEGGER J-Link.
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Configuring a Console
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=====================
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We will use OpenSDA as a USB-to-serial adapter for the serial console.
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Use the following settings with your serial terminal of choice (minicom, putty, etc.):
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- Speed: 115200
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- Data: 8 bits
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- Parity: None
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- Stop bits: 1
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.. include:: ../../common/board-footer.rst
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:start-after: nxp-board-footer
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References
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**********
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.. target-notes::
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.. _NXP S32K148-Q176:
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https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32k148-q176-evaluation-board-for-automotive-general-purpose:S32K148EVB
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.. _NXP S32K148:
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https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32k-auto-general-purpose-mcus/s32k1-microcontrollers-for-automotive-general-purpose:S32K1
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.. _SEGGER J-Link:
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https://wiki.segger.com/S32Kxxx
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/*
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* Copyright 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/s32/S32K148_LQFP176-pinctrl.h>
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&pinctrl {
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lpuart0_default: lpuart0_default {
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group0 {
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pinmux = <LPUART0_RX_PTA2>, <LPUART0_TX_PTA3>;
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drive-strength = "low";
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};
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};
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lpuart1_default: lpuart1_default {
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group0 {
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pinmux = <LPUART1_RX_PTC6>, <LPUART1_TX_PTC7>;
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drive-strength = "low";
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};
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};
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lpi2c0_default: lpi2c0_default {
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group1 {
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pinmux = <LPI2C0_SDAS_PTB10>, <LPI2C0_SCLS_PTB9>;
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drive-strength = "low";
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};
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};
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lpspi0_default: lpspi0_default {
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group0 {
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pinmux = <LPSPI0_SCK_PTB2>,
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<LPSPI0_SIN_PTB3>,
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<LPSPI0_SOUT_PTB1>,
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<LPSPI0_PCS0_PTB0>;
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drive-strength = "low";
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};
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};
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ftm4_default: ftm4_default {
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group0 {
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pinmux = <FTM4_CH1_PTE21>,
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<FTM4_CH2_PTE22>,
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<FTM4_CH3_PTE23>;
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drive-strength = "low";
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};
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};
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flexcan0_default: flexcan0_default {
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group0 {
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pinmux = <CAN0_RX_PTE4>, <CAN0_TX_PTE5>;
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drive-strength = "low";
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};
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};
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pinmux_enet: pinmux_enet {
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group1 {
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pinmux = <MII_RMII_RX_ER_PTC16>,
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<MII_RMII_RXD1_PTC0>,
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<MII_RMII_RXD0_PTC1>,
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<MII_RMII_RX_DV_PTC17>,
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<MII_RMII_TX_EN_PTD12>,
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<MII_RMII_TXD0_PTC2>,
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<MII_RMII_TXD1_PTD7>,
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<MII_RMII_TX_CLK_PTD11>;
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drive-strength = "low";
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slew-rate = "fast";
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};
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};
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pinmux_enet_mdio: pinmux_enet_mdio {
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group0 {
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pinmux = <MII_RMII_MDIO_PTB4>;
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drive-strength = "low";
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drive-open-drain;
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bias-pull-up;
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slew-rate = "fast";
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};
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group1 {
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pinmux = <MII_RMII_MDC_PTB5>;
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drive-strength = "low";
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slew-rate = "fast";
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};
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};
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};

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