arch: arm: cortex_m: handle multi-level interrupts in irq init

Multi-level interrupts should be handled in irq init. Only level1
interrupts going directly to interrupt controller need to be
initialized.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

Author: yangbolu1991

arch/arm/core/cortex_m/irq_init.c

@@ -27,7 +27,12 @@ void z_arm_interrupt_init(void)
 {
 	int irq = 0;
 
+/* CONFIG_2ND_LVL_ISR_TBL_OFFSET could be treated as total number of level1 interrupts */
+#if defined(CONFIG_MULTI_LEVEL_INTERRUPTS) && defined(CONFIG_2ND_LVL_ISR_TBL_OFFSET)
+	for (; irq < CONFIG_2ND_LVL_ISR_TBL_OFFSET; irq++) {
+#else
 	for (; irq < CONFIG_NUM_IRQS; irq++) {
+#endif
 		NVIC_SetPriority((IRQn_Type)irq, _IRQ_PRIO_OFFSET);
 	}
 }