|
45 | 45 | #clock-cells = <1>;
|
46 | 46 | };
|
47 | 47 |
|
| 48 | + flx0: flexcom@e1818000 { |
| 49 | + compatible = "microchip,sam-flexcom"; |
| 50 | + reg = <0xe1818000 0x200>; |
| 51 | + #address-cells = <1>; |
| 52 | + #size-cells = <1>; |
| 53 | + ranges = <0x0 0xe1818000 0x800>; |
| 54 | + status = "disabled"; |
| 55 | + |
| 56 | + usart0: serial@200 { |
| 57 | + compatible = "atmel,sam-usart"; |
| 58 | + reg = <0x200 0x200>; |
| 59 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; |
| 60 | + interrupt-parent = <&gic>; |
| 61 | + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 62 | + status = "disabled"; |
| 63 | + }; |
| 64 | + }; |
| 65 | + |
| 66 | + flx1: flexcom@e181c000 { |
| 67 | + compatible = "microchip,sam-flexcom"; |
| 68 | + reg = <0xe181c000 0x200>; |
| 69 | + #address-cells = <1>; |
| 70 | + #size-cells = <1>; |
| 71 | + ranges = <0x0 0xe181c000 0x800>; |
| 72 | + status = "disabled"; |
| 73 | + |
| 74 | + usart1: serial@200 { |
| 75 | + compatible = "atmel,sam-usart"; |
| 76 | + reg = <0x200 0x200>; |
| 77 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; |
| 78 | + interrupt-parent = <&gic>; |
| 79 | + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 80 | + status = "disabled"; |
| 81 | + }; |
| 82 | + }; |
| 83 | + |
| 84 | + flx2: flexcom@e1820000 { |
| 85 | + compatible = "microchip,sam-flexcom"; |
| 86 | + reg = <0xe1820000 0x200>; |
| 87 | + #address-cells = <1>; |
| 88 | + #size-cells = <1>; |
| 89 | + ranges = <0x0 0xe1820000 0x800>; |
| 90 | + status = "disabled"; |
| 91 | + |
| 92 | + usart2: serial@200 { |
| 93 | + compatible = "atmel,sam-usart"; |
| 94 | + reg = <0x200 0x200>; |
| 95 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 40>; |
| 96 | + interrupt-parent = <&gic>; |
| 97 | + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 98 | + status = "disabled"; |
| 99 | + }; |
| 100 | + }; |
| 101 | + |
48 | 102 | flx3: flexcom@e1824000 {
|
49 | 103 | compatible = "microchip,sam-flexcom";
|
50 | 104 | reg = <0xe1824000 0x200>;
|
|
63 | 117 | };
|
64 | 118 | };
|
65 | 119 |
|
| 120 | + flx4: flexcom@e2018000 { |
| 121 | + compatible = "microchip,sam-flexcom"; |
| 122 | + reg = <0xe2018000 0x200>; |
| 123 | + #address-cells = <1>; |
| 124 | + #size-cells = <1>; |
| 125 | + ranges = <0x0 0xe2018000 0x800>; |
| 126 | + status = "disabled"; |
| 127 | + |
| 128 | + usart4: serial@200 { |
| 129 | + compatible = "atmel,sam-usart"; |
| 130 | + reg = <0x200 0x200>; |
| 131 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; |
| 132 | + interrupt-parent = <&gic>; |
| 133 | + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 134 | + status = "disabled"; |
| 135 | + }; |
| 136 | + }; |
| 137 | + |
| 138 | + flx5: flexcom@e201c000 { |
| 139 | + compatible = "microchip,sam-flexcom"; |
| 140 | + reg = <0xe201c000 0x200>; |
| 141 | + #address-cells = <1>; |
| 142 | + #size-cells = <1>; |
| 143 | + ranges = <0x0 0xe201c000 0x800>; |
| 144 | + status = "disabled"; |
| 145 | + |
| 146 | + usart5: serial@200 { |
| 147 | + compatible = "atmel,sam-usart"; |
| 148 | + reg = <0x200 0x200>; |
| 149 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; |
| 150 | + interrupt-parent = <&gic>; |
| 151 | + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 152 | + status = "disabled"; |
| 153 | + }; |
| 154 | + }; |
| 155 | + |
| 156 | + flx6: flexcom@e2020000 { |
| 157 | + compatible = "microchip,sam-flexcom"; |
| 158 | + reg = <0xe2020000 0x200>; |
| 159 | + #address-cells = <1>; |
| 160 | + #size-cells = <1>; |
| 161 | + ranges = <0x0 0xe2020000 0x800>; |
| 162 | + status = "disabled"; |
| 163 | + |
| 164 | + usart6: serial@200 { |
| 165 | + compatible = "atmel,sam-usart"; |
| 166 | + reg = <0x200 0x200>; |
| 167 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; |
| 168 | + interrupt-parent = <&gic>; |
| 169 | + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 170 | + status = "disabled"; |
| 171 | + }; |
| 172 | + }; |
| 173 | + |
| 174 | + flx7: flexcom@e2024000 { |
| 175 | + compatible = "microchip,sam-flexcom"; |
| 176 | + reg = <0xe2024000 0x200>; |
| 177 | + #address-cells = <1>; |
| 178 | + #size-cells = <1>; |
| 179 | + ranges = <0x0 0xe2024000 0x800>; |
| 180 | + status = "disabled"; |
| 181 | + |
| 182 | + usart7: serial@200 { |
| 183 | + compatible = "atmel,sam-usart"; |
| 184 | + reg = <0x200 0x200>; |
| 185 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; |
| 186 | + interrupt-parent = <&gic>; |
| 187 | + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 188 | + status = "disabled"; |
| 189 | + }; |
| 190 | + }; |
| 191 | + |
| 192 | + flx8: flexcom@e2818000 { |
| 193 | + compatible = "microchip,sam-flexcom"; |
| 194 | + reg = <0xe2818000 0x200>; |
| 195 | + #address-cells = <1>; |
| 196 | + #size-cells = <1>; |
| 197 | + ranges = <0x0 0xe2818000 0x800>; |
| 198 | + status = "disabled"; |
| 199 | + |
| 200 | + usart8: serial@200 { |
| 201 | + compatible = "atmel,sam-usart"; |
| 202 | + reg = <0x200 0x200>; |
| 203 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; |
| 204 | + interrupt-parent = <&gic>; |
| 205 | + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 206 | + status = "disabled"; |
| 207 | + }; |
| 208 | + }; |
| 209 | + |
| 210 | + flx9: flexcom@e281c000 { |
| 211 | + compatible = "microchip,sam-flexcom"; |
| 212 | + reg = <0xe281c000 0x200>; |
| 213 | + #address-cells = <1>; |
| 214 | + #size-cells = <1>; |
| 215 | + ranges = <0x0 0xe281c000 0x800>; |
| 216 | + status = "disabled"; |
| 217 | + |
| 218 | + usart9: serial@200 { |
| 219 | + compatible = "atmel,sam-usart"; |
| 220 | + reg = <0x200 0x200>; |
| 221 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 47>; |
| 222 | + interrupt-parent = <&gic>; |
| 223 | + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 224 | + status = "disabled"; |
| 225 | + }; |
| 226 | + }; |
| 227 | + |
| 228 | + flx10: flexcom@e2820000 { |
| 229 | + compatible = "microchip,sam-flexcom"; |
| 230 | + reg = <0xe2820000 0x200>; |
| 231 | + #address-cells = <1>; |
| 232 | + #size-cells = <1>; |
| 233 | + ranges = <0x0 0xe2820000 0x800>; |
| 234 | + status = "disabled"; |
| 235 | + |
| 236 | + usart10: serial@200 { |
| 237 | + compatible = "atmel,sam-usart"; |
| 238 | + reg = <0x200 0x200>; |
| 239 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 48>; |
| 240 | + interrupt-parent = <&gic>; |
| 241 | + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 242 | + status = "disabled"; |
| 243 | + }; |
| 244 | + }; |
| 245 | + |
| 246 | + flx11: flexcom@e2824000 { |
| 247 | + compatible = "microchip,sam-flexcom"; |
| 248 | + reg = <0xe2824000 0x200>; |
| 249 | + #address-cells = <1>; |
| 250 | + #size-cells = <1>; |
| 251 | + ranges = <0x0 0xe2824000 0x800>; |
| 252 | + status = "disabled"; |
| 253 | + |
| 254 | + usart11: serial@200 { |
| 255 | + compatible = "atmel,sam-usart"; |
| 256 | + reg = <0x200 0x200>; |
| 257 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 49>; |
| 258 | + interrupt-parent = <&gic>; |
| 259 | + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; |
| 260 | + status = "disabled"; |
| 261 | + }; |
| 262 | + }; |
| 263 | + |
66 | 264 | gic: interrupt-controller@e8c11000 {
|
67 | 265 | compatible = "arm,gic-v2", "arm,gic";
|
68 | 266 | reg = <0xe8c11000 0x1000>, <0xe8c12000 0x100>;
|
|
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