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FRASTMkartben
FRASTM
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drivers: flash: stm32 flash driver common functions
Move the flash_stm32_write_protection and flash_stm32_option_bytes_lock functions to a common file for stm32 devices including stm32h7 Signed-off-by: Francois Ramu <francois.ramu@st.com>
1 parent 6b3d53e commit 5dc5373

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4 files changed

+81
-107
lines changed

4 files changed

+81
-107
lines changed

‎drivers/flash/flash_stm32.c

Lines changed: 1 addition & 78 deletions
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,6 @@ static const struct flash_parameters flash_stm32_parameters = {
4242
#endif
4343
};
4444

45-
static int flash_stm32_cr_lock(const struct device *dev, bool enable);
46-
4745
bool __weak flash_stm32_valid_range(const struct device *dev, off_t offset,
4846
uint32_t len, bool write)
4947
{
@@ -228,7 +226,7 @@ static int flash_stm32_write(const struct device *dev, off_t offset,
228226
return rc;
229227
}
230228

231-
static int flash_stm32_cr_lock(const struct device *dev, bool enable)
229+
int flash_stm32_cr_lock(const struct device *dev, bool enable)
232230
{
233231
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
234232

@@ -288,81 +286,6 @@ static int flash_stm32_cr_lock(const struct device *dev, bool enable)
288286
return rc;
289287
}
290288

291-
int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
292-
{
293-
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
294-
295-
#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 */
296-
if (enable) {
297-
regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
298-
} else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
299-
regs->OPTKEYR = FLASH_OPT_KEY1;
300-
regs->OPTKEYR = FLASH_OPT_KEY2;
301-
}
302-
#else
303-
int rc;
304-
305-
/* Unlock CR/PECR/NSCR register if needed. */
306-
if (!enable) {
307-
rc = flash_stm32_cr_lock(dev, false);
308-
if (rc) {
309-
return rc;
310-
}
311-
}
312-
#if defined(FLASH_CR_OPTWRE) /* F0, F1 and F3 */
313-
if (enable) {
314-
regs->CR &= ~FLASH_CR_OPTWRE;
315-
} else if (!(regs->CR & FLASH_CR_OPTWRE)) {
316-
regs->OPTKEYR = FLASH_OPTKEY1;
317-
regs->OPTKEYR = FLASH_OPTKEY2;
318-
}
319-
#elif defined(FLASH_CR_OPTLOCK) /* G0, G4, L4, WB and WL */
320-
if (enable) {
321-
regs->CR |= FLASH_CR_OPTLOCK;
322-
} else if (regs->CR & FLASH_CR_OPTLOCK) {
323-
regs->OPTKEYR = FLASH_OPTKEY1;
324-
regs->OPTKEYR = FLASH_OPTKEY2;
325-
}
326-
#elif defined(FLASH_PECR_OPTLOCK) /* L0 and L1 */
327-
if (enable) {
328-
regs->PECR |= FLASH_PECR_OPTLOCK;
329-
} else if (regs->PECR & FLASH_PECR_OPTLOCK) {
330-
regs->OPTKEYR = FLASH_OPTKEY1;
331-
regs->OPTKEYR = FLASH_OPTKEY2;
332-
}
333-
#elif defined(FLASH_NSCR_OPTLOCK) /* L5 and U5 */
334-
if (enable) {
335-
regs->NSCR |= FLASH_NSCR_OPTLOCK;
336-
} else if (regs->NSCR & FLASH_NSCR_OPTLOCK) {
337-
regs->OPTKEYR = FLASH_OPTKEY1;
338-
regs->OPTKEYR = FLASH_OPTKEY2;
339-
}
340-
#elif defined(FLASH_NSCR1_OPTLOCK) /* WBA */
341-
if (enable) {
342-
regs->NSCR1 |= FLASH_NSCR1_OPTLOCK;
343-
} else if (regs->NSCR1 & FLASH_NSCR1_OPTLOCK) {
344-
regs->OPTKEYR = FLASH_OPTKEY1;
345-
regs->OPTKEYR = FLASH_OPTKEY2;
346-
}
347-
#endif
348-
/* Lock CR/PECR/NSCR register if needed. */
349-
if (enable) {
350-
rc = flash_stm32_cr_lock(dev, true);
351-
if (rc) {
352-
return rc;
353-
}
354-
}
355-
#endif
356-
357-
if (enable) {
358-
LOG_DBG("Option bytes locked");
359-
} else {
360-
LOG_DBG("Option bytes unlocked");
361-
}
362-
363-
return 0;
364-
}
365-
366289
#if defined(CONFIG_FLASH_EX_OP_ENABLED) && defined(CONFIG_FLASH_STM32_BLOCK_REGISTERS)
367290
int flash_stm32_control_register_disable(const struct device *dev)
368291
{

‎drivers/flash/flash_stm32.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,8 @@ struct flash_stm32_priv {
5555
#define FLASH_CR_SNB FLASH_CR_SSN
5656
#define FLASH_CR_SNB_Pos FLASH_CR_SSN_Pos
5757
#define KEYR1 KEYR
58+
#define FLASH_OPT_KEY1 FLASH_OPTKEY1
59+
#define FLASH_OPT_KEY2 FLASH_OPTKEY2
5860
#endif /* CONFIG_SOC_SERIES_STM32H7RSX */
5961

6062
/* Differentiate between arm trust-zone non-secure/secure, and others. */
@@ -71,11 +73,9 @@ struct flash_stm32_priv {
7173
#define FLASH_STM32_SR SR
7274
#endif
7375

74-
7576
#define FLASH_STM32_PRIV(dev) ((struct flash_stm32_priv *)((dev)->data))
7677
#define FLASH_STM32_REGS(dev) (FLASH_STM32_PRIV(dev)->regs)
7778

78-
7979
/* Redefinitions of flags and masks to harmonize stm32 series: */
8080
#if defined(CONFIG_SOC_SERIES_STM32U5X)
8181
#define FLASH_STM32_NSLOCK FLASH_NSCR_LOCK
@@ -329,13 +329,13 @@ int flash_stm32_block_erase_loop(const struct device *dev,
329329

330330
int flash_stm32_wait_flash_idle(const struct device *dev);
331331

332-
int flash_stm32_option_bytes_lock(const struct device *dev, bool enable);
333-
334332
uint32_t flash_stm32_option_bytes_read(const struct device *dev);
335333

336334
int flash_stm32_option_bytes_write(const struct device *dev, uint32_t mask,
337335
uint32_t value);
338336

337+
int flash_stm32_cr_lock(const struct device *dev, bool enable);
338+
339339
#ifdef CONFIG_SOC_SERIES_STM32WBX
340340
int flash_stm32_check_status(const struct device *dev);
341341
#endif /* CONFIG_SOC_SERIES_STM32WBX */

‎drivers/flash/flash_stm32_ex_op.c

Lines changed: 76 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,82 @@
2020

2121
LOG_MODULE_REGISTER(flash_stm32_ex_op, CONFIG_FLASH_LOG_LEVEL);
2222

23+
int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
24+
{
25+
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
26+
27+
#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 or H7 */
28+
if (enable) {
29+
regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
30+
} else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
31+
regs->OPTKEYR = FLASH_OPT_KEY1;
32+
regs->OPTKEYR = FLASH_OPT_KEY2;
33+
}
34+
#else
35+
int rc;
36+
37+
/* Unlock CR/PECR/NSCR register if needed. */
38+
if (!enable) {
39+
rc = flash_stm32_cr_lock(dev, false);
40+
if (rc) {
41+
return rc;
42+
}
43+
}
44+
45+
#if defined(FLASH_CR_OPTWRE) /* F0, F1 and F3 */
46+
if (enable) {
47+
regs->CR &= ~FLASH_CR_OPTWRE;
48+
} else if (!(regs->CR & FLASH_CR_OPTWRE)) {
49+
regs->OPTKEYR = FLASH_OPTKEY1;
50+
regs->OPTKEYR = FLASH_OPTKEY2;
51+
}
52+
#elif defined(FLASH_CR_OPTLOCK) /* G0, G4, L4, WB and WL */
53+
if (enable) {
54+
regs->CR |= FLASH_CR_OPTLOCK;
55+
} else if (regs->CR & FLASH_CR_OPTLOCK) {
56+
regs->OPTKEYR = FLASH_OPTKEY1;
57+
regs->OPTKEYR = FLASH_OPTKEY2;
58+
}
59+
#elif defined(FLASH_PECR_OPTLOCK) /* L0 and L1 */
60+
if (enable) {
61+
regs->PECR |= FLASH_PECR_OPTLOCK;
62+
} else if (regs->PECR & FLASH_PECR_OPTLOCK) {
63+
regs->OPTKEYR = FLASH_OPTKEY1;
64+
regs->OPTKEYR = FLASH_OPTKEY2;
65+
}
66+
#elif defined(FLASH_NSCR_OPTLOCK) /* L5 and U5 */
67+
if (enable) {
68+
regs->NSCR |= FLASH_NSCR_OPTLOCK;
69+
} else if (regs->NSCR & FLASH_NSCR_OPTLOCK) {
70+
regs->OPTKEYR = FLASH_OPTKEY1;
71+
regs->OPTKEYR = FLASH_OPTKEY2;
72+
}
73+
#elif defined(FLASH_NSCR1_OPTLOCK) /* WBA */
74+
if (enable) {
75+
regs->NSCR1 |= FLASH_NSCR1_OPTLOCK;
76+
} else if (regs->NSCR1 & FLASH_NSCR1_OPTLOCK) {
77+
regs->OPTKEYR = FLASH_OPTKEY1;
78+
regs->OPTKEYR = FLASH_OPTKEY2;
79+
}
80+
#endif
81+
/* Lock CR/PECR/NSCR register if needed. */
82+
if (enable) {
83+
rc = flash_stm32_cr_lock(dev, true);
84+
if (rc) {
85+
return rc;
86+
}
87+
}
88+
#endif
89+
90+
if (enable) {
91+
LOG_DBG("Option bytes locked");
92+
} else {
93+
LOG_DBG("Option bytes unlocked");
94+
}
95+
96+
return 0;
97+
}
98+
2399
#if defined(CONFIG_FLASH_STM32_WRITE_PROTECT)
24100
int flash_stm32_ex_op_sector_wp(const struct device *dev, const uintptr_t in,
25101
void *out)

‎drivers/flash/flash_stm32h7x.c

Lines changed: 0 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -309,31 +309,6 @@ int flash_stm32_option_bytes_disable(const struct device *dev)
309309
}
310310
#endif /* CONFIG_FLASH_STM32_BLOCK_REGISTERS */
311311

312-
int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
313-
{
314-
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
315-
316-
if (enable) {
317-
regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
318-
} else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
319-
#ifdef CONFIG_SOC_SERIES_STM32H7RSX
320-
regs->OPTKEYR = FLASH_OPTKEY1;
321-
regs->OPTKEYR = FLASH_OPTKEY2;
322-
#else
323-
regs->OPTKEYR = FLASH_OPT_KEY1;
324-
regs->OPTKEYR = FLASH_OPT_KEY2;
325-
#endif /* CONFIG_SOC_SERIES_STM32H7RSX */
326-
}
327-
328-
if (enable) {
329-
LOG_DBG("Option bytes locked");
330-
} else {
331-
LOG_DBG("Option bytes unlocked");
332-
}
333-
334-
return 0;
335-
}
336-
337312
bool flash_stm32_valid_range(const struct device *dev, off_t offset, uint32_t len, bool write)
338313
{
339314
#if defined(DUAL_BANK)

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