@@ -112,6 +112,53 @@ static int lsm6dsv16x_enable_g_int(const struct device *dev, int enable)
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return ret ;
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}
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+ /**
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+ * lsm6dsv16x_enable_wake_int - Enable selected int pin to generate wakeup interrupt
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+ */
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+ static int lsm6dsv16x_enable_wake_int (const struct device * dev , int enable )
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+ {
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+ const struct lsm6dsv16x_config * cfg = dev -> config ;
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+ stmdev_ctx_t * ctx = (stmdev_ctx_t * )& cfg -> ctx ;
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+ int ret ;
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+ lsm6dsv16x_interrupt_mode_t int_mode ;
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+
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+ int_mode .enable = enable ? 1 : 0 ;
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+ int_mode .lir = !cfg -> drdy_pulsed ;
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+ ret = lsm6dsv16x_interrupt_enable_set (ctx , int_mode );
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+ if (ret < 0 ) {
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+ LOG_ERR ("interrupt_enable_set error" );
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+ return ret ;
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+ }
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+
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+ if ((cfg -> drdy_pin == 1 ) || ON_I3C_BUS (cfg )) {
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+ lsm6dsv16x_pin_int_route_t val ;
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+
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+ ret = lsm6dsv16x_pin_int1_route_get (ctx , & val );
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+ if (ret < 0 ) {
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+ LOG_ERR ("pint_int1_route_get error" );
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+ return ret ;
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+ }
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+
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+ val .wakeup = enable ? 1 : 0 ;
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+
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+ ret = lsm6dsv16x_pin_int1_route_set (ctx , & val );
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+ } else {
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+ lsm6dsv16x_pin_int_route_t val ;
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+
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+ ret = lsm6dsv16x_pin_int2_route_get (ctx , & val );
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+ if (ret < 0 ) {
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+ LOG_ERR ("pint_int2_route_get error" );
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+ return ret ;
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+ }
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+
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+ val .wakeup = enable ? 1 : 0 ;
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+
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+ ret = lsm6dsv16x_pin_int2_route_set (ctx , & val );
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+ }
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+
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+ return ret ;
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+ }
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+
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/**
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* lsm6dsv16x_trigger_set - link external trigger to event data ready
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*/
@@ -156,7 +203,18 @@ int lsm6dsv16x_trigger_set(const struct device *dev,
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lsm6dsv16x_enable_g_int (dev , LSM6DSV16X_DIS_BIT );
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}
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}
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-
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+ break ;
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+ case SENSOR_TRIG_DELTA :
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+ if (trig -> chan != SENSOR_CHAN_ACCEL_XYZ ) {
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+ return - ENOTSUP ;
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+ }
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+ lsm6dsv16x -> handler_wakeup = handler ;
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+ lsm6dsv16x -> trig_wakeup = trig ;
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+ if (handler ) {
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+ lsm6dsv16x_enable_wake_int (dev , LSM6DSV16X_EN_BIT );
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+ } else {
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+ lsm6dsv16x_enable_wake_int (dev , LSM6DSV16X_DIS_BIT );
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+ }
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break ;
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default :
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ret = - ENOTSUP ;
@@ -178,6 +236,7 @@ static void lsm6dsv16x_handle_interrupt(const struct device *dev)
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const struct lsm6dsv16x_config * cfg = dev -> config ;
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stmdev_ctx_t * ctx = (stmdev_ctx_t * )& cfg -> ctx ;
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lsm6dsv16x_data_ready_t status ;
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+ lsm6dsv16x_all_int_src_t all_int_src ;
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int ret ;
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while (1 ) {
@@ -194,7 +253,13 @@ static void lsm6dsv16x_handle_interrupt(const struct device *dev)
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return ;
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}
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- if (((status .drdy_xl == 0 ) && (status .drdy_gy == 0 )) ||
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+ ret = lsm6dsv16x_read_reg (ctx , LSM6DSV16X_ALL_INT_SRC , (uint8_t * )& all_int_src , 1 );
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+ if (ret < 0 ) {
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+ LOG_DBG ("failed reading all_int_src reg" );
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+ return ;
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+ }
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+
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+ if (((status .drdy_xl == 0 ) && (status .drdy_gy == 0 ) && (all_int_src .wu_ia == 0 )) ||
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IS_ENABLED (CONFIG_LSM6DSV16X_STREAM )) {
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break ;
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}
@@ -207,6 +272,9 @@ static void lsm6dsv16x_handle_interrupt(const struct device *dev)
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lsm6dsv16x -> handler_drdy_gyr (dev , lsm6dsv16x -> trig_drdy_gyr );
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}
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+ if ((all_int_src .wu_ia ) && lsm6dsv16x -> handler_wakeup != NULL ) {
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+ lsm6dsv16x -> handler_wakeup (dev , lsm6dsv16x -> trig_wakeup );
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+ }
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}
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if (!ON_I3C_BUS (cfg ) || (I3C_INT_PIN (cfg ))) {
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