arch: microblaze: IRQ Offload implementation (emulated)

Internal references: FWRIVERHD-5108

Signed-off-by: Alp Sayin <alpsayin@gmail.com>

Author: alpsayin

arch/microblaze/core/emulate_isr.S

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+/*
+ * Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
+ * Copyright (c) 2023 Alp Sayin <alpsayin@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+
+#include <zephyr/toolchain.h>
+#include <microblaze/microblaze_regs.h>
+#include <microblaze/microblaze_asm.h>
+
+
+.extern _interrupt_handler
+.globl microblaze_emulate_isr
+
+/* void microblaze_emulate_isr(void)
+ * Must be called with irqs unlocked!
+ * Must be called via inline asm with r14 as link register
+ */
+SECTION_FUNC(exception.other, microblaze_emulate_isr)
+	.ent microblaze_emulate_isr
+	/* Set the interrupt return address to after the
+	 * call to microblaze_emulate_isr */
+	ADD_IMM(r14, 4)
+	brai _interrupt_handler
+	.end    microblaze_emulate_isr

arch/microblaze/core/irq_offload.c

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+/*
+ * Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
+ * Copyright (c) 2023 Alp Sayin <alpsayin@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+
+#include <zephyr/irq_offload.h>
+#include <zephyr/kernel.h>
+#include <zephyr/kernel_structs.h>
+
+#include <microblaze/emulate_isr.h>
+
+#pragma message "MicroBlaze irq_offload is experimental"
+
+volatile irq_offload_routine_t _offload_routine;
+static volatile const void *offload_param;
+
+/* Called by _enter_irq if regardless of pending irqs.
+ * Just in case the offload routine itself reenables & generates
+ * an interrupt, clear the offload_routine global before executing.
+ */
+void z_irq_do_offload(void)
+{
+	irq_offload_routine_t tmp;
+
+	if (!_offload_routine) {
+		return;
+	}
+
+	tmp = _offload_routine;
+	_offload_routine = NULL;
+
+	tmp((const void *)offload_param);
+}
+
+void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
+{
+	microblaze_disable_interrupts();
+
+	_offload_routine = routine;
+	offload_param = parameter;
+
+	EMULATE_ISR();
+}

arch/microblaze/include/microblaze/emulate_isr.h

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+/*
+ * Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
+ * Copyright (c) 2023 Alp Sayin <alpsayin@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef ZEPHYR_ARCH_MICROBLAZE_INCLUDE_MICROBLAZE_EMULATE_ISR_H_
+#define ZEPHYR_ARCH_MICROBLAZE_INCLUDE_MICROBLAZE_EMULATE_ISR_H_
+
+#include <zephyr/arch/microblaze/arch.h>
+
+#include <microblaze/mb_interface.h>
+
+extern void microblaze_emulate_isr(void);
+
+#define EMULATE_ISR()	__asm__ volatile("\tbralid r14, microblaze_emulate_isr\n\tnop\n")
+
+#define EMULATE_IRQ(irq)                                                                           \
+	do {                                                                                       \
+		microblaze_disable_interrupts();                                                   \
+		arch_irq_set_emulated_pending(irq);                                                \
+		__asm__ volatile("\tbralid r14, microblaze_emulate_isr\n\tnop\n");                 \
+	} while (0)
+
+#endif /* ZEPHYR_ARCH_MICROBLAZE_INCLUDE_MICROBLAZE_EMULATE_ISR_H_ */