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cyliangtwfabiobaltieri
cyliangtw
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fabiobaltieri
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soc: nuvoton: numaker: add support for m55m1x series
Add initial support for nuvoton numaker m55m1x SoC series including basic init and device tree source include. Signed-off-by: cyliang tw <cyliang@nuvoton.com>
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‎dts/arm/nuvoton/m55m1h2l.dtsi

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/*
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* Copyright (c) 2025 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <nuvoton/m55m1x.dtsi>
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/ {
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sram0: memory@20100000 {
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compatible = "mmio-sram";
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reg = <0x20100000 DT_SIZE_K(1344)>;
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(128)>;
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zephyr,memory-region = "DTCM";
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};
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itcm: memory@0 {
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compatible = "zephyr,memory-region", "arm,itcm";
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reg = <0x00000000 DT_SIZE_K(64)>;
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zephyr,memory-region = "ITCM";
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};
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soc {
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fmc: flash-controller@40044000 {
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flash0: flash@100000 {
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reg = <0x100000 DT_SIZE_K(2048)>;
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};
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};
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};
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};

‎dts/arm/nuvoton/m55m1x.dtsi

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/*
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* Copyright (c) 2025 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv8.1-m.dtsi>
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#include <mem.h>
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#include <freq.h>
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#include <zephyr/dt-bindings/clock/numaker_m55m1x_clock.h>
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#include <zephyr/dt-bindings/reset/numaker_m55m1x_reset.h>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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/ {
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chosen {
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zephyr,flash-controller = &fmc;
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};
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aliases {
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rtc = &rtc;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m55";
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reg = <0>;
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};
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};
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <DT_FREQ_M(220)>;
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#clock-cells = <0>;
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};
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soc {
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scc: system-clock-controller@40001000 {
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compatible = "nuvoton,numaker-scc";
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reg = <0x40001000 0x100>;
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#clock-cells = <0>;
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lxt = "enable";
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clk-pclkdiv = <(NUMAKER_CLK_PCLKDIV_PCLK0DIV(2) |
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NUMAKER_CLK_PCLKDIV_PCLK1DIV(2) |
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NUMAKER_CLK_PCLKDIV_PCLK2DIV(2) |
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NUMAKER_CLK_PCLKDIV_PCLK3DIV(2) |
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NUMAKER_CLK_PCLKDIV_PCLK4DIV(2))>;
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core-clock = <DT_FREQ_M(220)>;
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powerdown-mode = <NUMAKER_PMC_SPD0>;
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pcc: peripheral-clock-controller {
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compatible = "nuvoton,numaker-pcc";
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#clock-cells = <3>;
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};
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};
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rst: reset-controller@40000000 {
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compatible = "nuvoton,numaker-rst";
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reg = <0x40000000 0x2e0>;
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#reset-cells = <1>;
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};
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fmc: flash-controller@40044000 {
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compatible = "nuvoton,numaker-fmc";
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reg = <0x40044000 0x120>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@100000 {
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compatible = "soc-nv-flash";
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erase-block-size = <8192>;
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write-block-size = <4>;
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};
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};
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uart0: serial@4024d000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x4024d000 0x1000>;
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interrupts = <75 0>;
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resets = <&rst NUMAKER_SYS_UART0RST>;
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clocks = <&pcc NUMAKER_UART0_MODULE NUMAKER_CLK_UARTSEL0_UART0SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART0DIV(1)>;
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status = "disabled";
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};
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uart1: serial@4028d000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x4028d000 0x1000>;
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interrupts = <76 0>;
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resets = <&rst NUMAKER_SYS_UART1RST>;
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clocks = <&pcc NUMAKER_UART1_MODULE NUMAKER_CLK_UARTSEL0_UART1SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART1DIV(1)>;
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status = "disabled";
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};
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uart2: serial@4024e000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x4024e000 0x1000>;
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interrupts = <77 0>;
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resets = <&rst NUMAKER_SYS_UART2RST>;
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clocks = <&pcc NUMAKER_UART2_MODULE NUMAKER_CLK_UARTSEL0_UART2SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART2DIV(1)>;
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status = "disabled";
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};
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uart3: serial@4028e000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x4028e000 0x1000>;
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interrupts = <78 0>;
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resets = <&rst NUMAKER_SYS_UART3RST>;
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clocks = <&pcc NUMAKER_UART3_MODULE NUMAKER_CLK_UARTSEL0_UART3SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART3DIV(1)>;
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status = "disabled";
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};
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uart4: serial@4024f000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x4024f000 0x1000>;
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interrupts = <79 0>;
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resets = <&rst NUMAKER_SYS_UART4RST>;
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clocks = <&pcc NUMAKER_UART4_MODULE NUMAKER_CLK_UARTSEL0_UART4SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART4DIV(1)>;
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status = "disabled";
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};
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uart5: serial@4028f000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x4028f000 0x1000>;
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interrupts = <80 0>;
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resets = <&rst NUMAKER_SYS_UART5RST>;
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clocks = <&pcc NUMAKER_UART5_MODULE NUMAKER_CLK_UARTSEL0_UART5SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART5DIV(1)>;
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status = "disabled";
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};
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uart6: serial@40250000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x40250000 0x1000>;
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interrupts = <81 0>;
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resets = <&rst NUMAKER_SYS_UART6RST>;
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clocks = <&pcc NUMAKER_UART6_MODULE NUMAKER_CLK_UARTSEL0_UART6SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART6DIV(1)>;
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status = "disabled";
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};
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uart7: serial@40290000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x40290000 0x1000>;
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interrupts = <82 0>;
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resets = <&rst NUMAKER_SYS_UART7RST>;
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clocks = <&pcc NUMAKER_UART7_MODULE NUMAKER_CLK_UARTSEL0_UART7SEL_HIRC
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NUMAKER_CLK_UARTDIV0_UART7DIV(1)>;
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status = "disabled";
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};
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uart8: serial@40251000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x40251000 0x1000>;
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interrupts = <83 0>;
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resets = <&rst NUMAKER_SYS_UART8RST>;
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clocks = <&pcc NUMAKER_UART8_MODULE NUMAKER_CLK_UARTSEL1_UART8SEL_HIRC
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NUMAKER_CLK_UARTDIV1_UART8DIV(1)>;
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status = "disabled";
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};
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uart9: serial@40291000 {
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compatible = "nuvoton,numaker-uart";
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reg = <0x40291000 0x1000>;
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interrupts = <84 0>;
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resets = <&rst NUMAKER_SYS_UART9RST>;
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clocks = <&pcc NUMAKER_UART9_MODULE NUMAKER_CLK_UARTSEL1_UART9SEL_HIRC
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NUMAKER_CLK_UARTDIV1_UART9DIV(1)>;
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status = "disabled";
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};
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pinctrl: pin-controller@40000080 {
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compatible = "nuvoton,numaker-pinctrl";
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reg = <0x40000080 0x30
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0x40000300 0x100>;
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reg-names = "mfos", "mfp";
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};
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gpioa: gpio@40229000 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229000 0x40>;
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clocks = <&pcc NUMAKER_GPIOA_MODULE 0 0>;
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status = "disabled";
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interrupts = <20 2>;
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};
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gpiob: gpio@40229040 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229040 0x40>;
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clocks = <&pcc NUMAKER_GPIOB_MODULE 0 0>;
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status = "disabled";
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interrupts = <21 2>;
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};
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gpioc: gpio@40229080 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229080 0x40>;
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clocks = <&pcc NUMAKER_GPIOC_MODULE 0 0>;
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status = "disabled";
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interrupts = <22 2>;
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};
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gpiod: gpio@402290c0 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x402290c0 0x40>;
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clocks = <&pcc NUMAKER_GPIOD_MODULE 0 0>;
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status = "disabled";
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interrupts = <23 2>;
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};
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gpioe: gpio@40229100 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229100 0x40>;
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clocks = <&pcc NUMAKER_GPIOE_MODULE 0 0>;
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status = "disabled";
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interrupts = <24 2>;
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};
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gpiof: gpio@40229140 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229140 0x40>;
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clocks = <&pcc NUMAKER_GPIOF_MODULE 0 0>;
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status = "disabled";
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interrupts = <25 2>;
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};
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gpiog: gpio@40229180 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229180 0x40>;
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clocks = <&pcc NUMAKER_GPIOG_MODULE 0 0>;
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status = "disabled";
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interrupts = <26 2>;
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};
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gpioh: gpio@402291c0 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x402291c0 0x40>;
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clocks = <&pcc NUMAKER_GPIOH_MODULE 0 0>;
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status = "disabled";
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interrupts = <27 2>;
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};
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gpioi: gpio@40229200 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229200 0x40>;
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clocks = <&pcc NUMAKER_GPIOI_MODULE 0 0>;
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status = "disabled";
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interrupts = <28 2>;
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};
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gpioj: gpio@40229240 {
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compatible = "nuvoton,numaker-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40229240 0x40>;
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clocks = <&pcc NUMAKER_GPIOJ_MODULE 0 0>;
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status = "disabled";
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interrupts = <29 2>;
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};
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rtc: rtc@40297000 {
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compatible = "nuvoton,numaker-rtc";
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reg = <0x40297000 0x1000>;
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interrupts = <6 0>;
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oscillator = "lxt";
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clocks = <&pcc NUMAKER_RTC0_MODULE 0 0>;
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alarms-count = <1>;
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};

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