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22 | 22 | #include <zephyr/logging/log.h>
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23 | 23 |
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24 | 24 | #include "flash_stm32.h"
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25 |
| -#include "stm32_hsem.h" |
26 | 25 |
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27 | 26 | LOG_MODULE_REGISTER(flash_stm32, CONFIG_FLASH_LOG_LEVEL);
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28 | 27 |
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@@ -59,32 +58,6 @@ int __weak flash_stm32_check_configuration(void)
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59 | 58 | return 0;
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60 | 59 | }
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61 | 60 |
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62 |
| -#if defined(CONFIG_MULTITHREADING) |
63 |
| -/* |
64 |
| - * This is named flash_stm32_sem_take instead of flash_stm32_lock (and |
65 |
| - * similarly for flash_stm32_sem_give) to avoid confusion with locking |
66 |
| - * actual flash pages. |
67 |
| - */ |
68 |
| -static inline void _flash_stm32_sem_take(const struct device *dev) |
69 |
| -{ |
70 |
| - k_sem_take(&FLASH_STM32_PRIV(dev)->sem, K_FOREVER); |
71 |
| - z_stm32_hsem_lock(CFG_HW_FLASH_SEMID, HSEM_LOCK_WAIT_FOREVER); |
72 |
| -} |
73 |
| - |
74 |
| -static inline void _flash_stm32_sem_give(const struct device *dev) |
75 |
| -{ |
76 |
| - z_stm32_hsem_unlock(CFG_HW_FLASH_SEMID); |
77 |
| - k_sem_give(&FLASH_STM32_PRIV(dev)->sem); |
78 |
| -} |
79 |
| - |
80 |
| -#define flash_stm32_sem_init(dev) k_sem_init(&FLASH_STM32_PRIV(dev)->sem, 1, 1) |
81 |
| -#define flash_stm32_sem_take(dev) _flash_stm32_sem_take(dev) |
82 |
| -#define flash_stm32_sem_give(dev) _flash_stm32_sem_give(dev) |
83 |
| -#else |
84 |
| -#define flash_stm32_sem_init(dev) |
85 |
| -#define flash_stm32_sem_take(dev) |
86 |
| -#define flash_stm32_sem_give(dev) |
87 |
| -#endif |
88 | 61 |
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89 | 62 | #if !defined(CONFIG_SOC_SERIES_STM32WBX)
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90 | 63 | static int flash_stm32_check_status(const struct device *dev)
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@@ -319,7 +292,7 @@ int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
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319 | 292 | {
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320 | 293 | FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
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321 | 294 |
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322 |
| -#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 and H7 */ |
| 295 | +#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 */ |
323 | 296 | if (enable) {
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324 | 297 | regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
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325 | 298 | } else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
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@@ -395,7 +368,7 @@ static int flash_stm32_control_register_disable(const struct device *dev)
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395 | 368 | {
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396 | 369 | FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
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397 | 370 |
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398 |
| -#if defined(FLASH_CR_LOCK) /* F0, F1, F2, F3, F4, F7, L4, G0, G4, H7, WB, WL \ |
| 371 | +#if defined(FLASH_CR_LOCK) /* F0, F1, F2, F3, F4, F7, L4, G0, G4, WB, WL \ |
399 | 372 | */
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400 | 373 | /*
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401 | 374 | * Access to control register can be disabled by writing wrong key to
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@@ -425,7 +398,7 @@ static int flash_stm32_option_bytes_disable(const struct device *dev)
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425 | 398 | {
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426 | 399 | FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
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427 | 400 |
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428 |
| -#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 and H7 */ |
| 401 | +#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 */ |
429 | 402 | /*
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430 | 403 | * Access to option register can be disabled by writing wrong key to
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431 | 404 | * the key register. Option register will remain disabled until reset.
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