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henrikbrixandersendkalowsk
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soc: neorv32: list NEORV32 v1.11.6 as currently supported version
List NEORV32 v1.11.6 as the currently supported version. No changes to the in-tree drivers needed for the changes between v1.11.3 and v1.11.6. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
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boards/others/neorv32/doc/index.rst

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@@ -13,7 +13,7 @@ For more information about the NEORV32, see the following websites:
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- `The NEORV32 RISC-V Processor Datasheet`_
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- `The NEORV32 RISC-V Processor User Guide`_
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The currently supported version is NEORV32 v1.11.3.
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The currently supported version is NEORV32 v1.11.6.
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Supported Board Targets
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=======================

doc/releases/migration-guide-4.2.rst

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* The DT binding :dtcompatible:`zephyr,native-posix-cpu` has been deprecated in favor of
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:dtcompatible:`zephyr,native-sim-cpu`.
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* Zephyr now supports version 1.11.3 of the :zephyr:board:`neorv32`. NEORV32 processor (SoC)
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* Zephyr now supports version 1.11.6 of the :zephyr:board:`neorv32`. NEORV32 processor (SoC)
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implementations need to be updated to this version to be compatible with Zephyr v4.2.0.
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* The :zephyr:board:`neorv32` now targets NEORV32 processor (SoC) templates via board variants. The

soc/neorv32/Kconfig

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@@ -13,7 +13,7 @@ if SOC_NEORV32
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config SOC_NEORV32_VERSION
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hex
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default 0x01110300
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default 0x01110600
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help
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The targeted NEORV32 version as BCD-coded number. The format is
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identical to that of the NEORV32 Machine implementation ID (mimpid)

soc/neorv32/soc.h

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/* System information (SYSINFO) SOC register bits */
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#define NEORV32_SYSINFO_SOC_BOOTLOADER BIT(0)
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#define NEORV32_SYSINFO_SOC_XBUS BIT(1)
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#define NEORV32_SYSINFO_SOC_MEM_INT_IMEM BIT(2)
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#define NEORV32_SYSINFO_SOC_MEM_INT_DMEM BIT(3)
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#define NEORV32_SYSINFO_SOC_IMEM BIT(2)
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#define NEORV32_SYSINFO_SOC_DMEM BIT(3)
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#define NEORV32_SYSINFO_SOC_OCD BIT(4)
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#define NEORV32_SYSINFO_SOC_ICACHE BIT(5)
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#define NEORV32_SYSINFO_SOC_DCACHE BIT(6)
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#define NEORV32_SYSINFO_SOC_XBUS_CACHE BIT(8)
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#define NEORV32_SYSINFO_SOC_OCD_AUTH BIT(11)
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#define NEORV32_SYSINFO_SOC_IMEM_ROM BIT(12)
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#define NEORV32_SYSINFO_SOC_IO_TWD BIT(13)
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#define NEORV32_SYSINFO_SOC_IO_SDI BIT(24)
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#define NEORV32_SYSINFO_SOC_IO_UART1 BIT(25)
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#define NEORV32_SYSINFO_SOC_IO_NEOLED BIT(26)
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#define NEORV32_SYSINFO_SOC_IO_HWSPINLOCK BIT(27)
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#define NEORV32_SYSINFO_SOC_IO_GPTMR BIT(28)
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#define NEORV32_SYSINFO_SOC_IO_SLINK BIT(29)
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#define NEORV32_SYSINFO_SOC_IO_ONEWIRE BIT(30)
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#define NEORV32_SYSINFO_SOC_IO_CRC BIT(31)
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/* System information (SYSINFO) CACHE register bits */
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#define NEORV32_SYSINFO_CACHE_INST_BLOCK_SIZE GENMASK(3, 0)
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#define NEORV32_SYSINFO_CACHE_INST_NUM_BLOCKS GENMASK(7, 4)
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#define NEORV32_SYSINFO_CACHE_DATA_BLOCK_SIZE GENMASK(11, 8)
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#define NEORV32_SYSINFO_CACHE_DATA_NUM_BLOCKS GENMASK(15, 12)
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#define NEORV32_SYSINFO_CACHE_XBUS_BLOCK_SIZE GENMASK(27, 24)
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#define NEORV32_SYSINFO_CACHE_XBUS_NUM_BLOCKS GENMASK(31, 28)
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#endif /* _NEORV32_SOC_H */

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