soc: microchip: sam: optimize array size for sama7g5 registered clocks

TonyHan11 · TonyHan11 · commit 2d35c7c5d74c · 2025-07-15T09:48:35.000+08:00
Replace the array size for sama7g5 registered clocks with macros and
put the macros to soc.h with descriptions.

Signed-off-by: Tony Han &lt;tony.han@microchip.com&gt;
diff --git a/soc/microchip/sam/common/clk-generated.c b/soc/microchip/sam/common/clk-generated.c
@@ -29,7 +29,7 @@ struct clk_generated {
 
 #define to_clk_generated(ptr) CONTAINER_OF(ptr, struct clk_generated, clk)
 
-static struct clk_generated clocks_gck[ID_PERIPH_MAX];
+static struct clk_generated clocks_gck[SOC_NUM_CLOCK_GENERATED];
 static uint32_t clocks_gck_idx;
 
 static int clk_generated_on(const struct device *dev, clock_control_subsys_t sys)
diff --git a/soc/microchip/sam/common/clk-master.c b/soc/microchip/sam/common/clk-master.c
@@ -19,7 +19,7 @@ LOG_MODULE_REGISTER(clk_mck, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
 
 #define PMC_MCR_CSS_SHIFT	16
 
-#define MASTER_MAX_ID		4
+#define MASTER_MAX_ID		(SOC_NUM_CLOCK_MASTER - 1)
 
 #define to_clk_master(ptr) CONTAINER_OF(ptr, struct clk_master, clk)
 
@@ -38,7 +38,7 @@ struct clk_master {
 	uint8_t div;
 };
 
-static struct clk_master clocks_master[5];
+static struct clk_master clocks_master[SOC_NUM_CLOCK_MASTER];
 static uint32_t clocks_master_idx;
 
 static inline bool clk_master_ready(struct clk_master *master)
diff --git a/soc/microchip/sam/common/clk-peripheral.c b/soc/microchip/sam/common/clk-peripheral.c
@@ -25,7 +25,7 @@ struct clk_peripheral {
 	const struct clk_pcr_layout *layout;
 };
 
-static struct clk_peripheral clocks_periph[72];
+static struct clk_peripheral clocks_periph[SOC_NUM_CLOCK_PERIPHERAL];
 static uint32_t clocks_periph_idx;
 
 #define to_clk_peripheral(ptr) CONTAINER_OF(ptr, struct clk_peripheral, clk)
diff --git a/soc/microchip/sam/common/clk-sam9x60-pll.c b/soc/microchip/sam/common/clk-sam9x60-pll.c
@@ -46,7 +46,7 @@ LOG_MODULE_REGISTER(clk_pll, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
 	q * n_ + r * n_ / d_;				\
 })
 
-#define PLL_MAX_ID		7
+#define PLL_MAX_ID		SOC_NUM_CLOCK_PLL_FRAC
 
 struct sam9x60_pll_core {
 	pmc_registers_t *pmc;
@@ -73,10 +73,10 @@ struct sam9x60_div {
 #define to_sam9x60_frac(ptr)		CONTAINER_OF(ptr, struct sam9x60_frac, core)
 #define to_sam9x60_div(ptr)		CONTAINER_OF(ptr, struct sam9x60_div, core)
 
-static struct sam9x60_frac clocks_frac[7];
+static struct sam9x60_frac clocks_frac[SOC_NUM_CLOCK_PLL_FRAC];
 static uint32_t clocks_frac_idx;
 
-static struct sam9x60_div clocks_div[8];
+static struct sam9x60_div clocks_div[SOC_NUM_CLOCK_PLL_DIV];
 static uint32_t clocks_div_idx;
 
 static inline bool sam9x60_pll_ready(pmc_registers_t *pmc, int id)
diff --git a/soc/microchip/sam/common/clk-system.c b/soc/microchip/sam/common/clk-system.c
@@ -25,7 +25,7 @@ struct clk_system {
 	uint8_t id;
 };
 
-static struct clk_system clocks_sys[8];
+static struct clk_system clocks_sys[SOC_NUM_CLOCK_SYSTEM];
 static uint32_t clocks_sys_idx;
 
 static inline int is_pck(int id)
diff --git a/soc/microchip/sam/sama7g5/soc.h b/soc/microchip/sam/sama7g5/soc.h
@@ -13,4 +13,13 @@
 
 #include "sam.h"
 
+/* number of clocks registered */
+#define SOC_NUM_CLOCK_PLL_FRAC     7
+#define SOC_NUM_CLOCK_PLL_DIV      (SOC_NUM_CLOCK_PLL_FRAC + 1) /* AUDIO PLL: DIVPMC, DIVIO */
+#define SOC_NUM_CLOCK_MASTER       5	/* MCK 0 ~ 4 */
+#define SOC_NUM_CLOCK_PROGRAMMABLE 8	/* MCK 0 ~ 7 */
+#define SOC_NUM_CLOCK_SYSTEM       8	/* PCK 0 ~ 7 */
+#define SOC_NUM_CLOCK_PERIPHERAL   72
+#define SOC_NUM_CLOCK_GENERATED    46
+
 #endif /* __SAMA7G5_SOC__H_ */
