Add support for SiLabs EFR32ZG28 SoC

Author: shontal1005

boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.dts

@@ -246,14 +246,8 @@
 			reg = <0x00040000 DT_SIZE_K(208)>;
 		};
 
-		/* Reserve 32 kB for the scratch partition */
-		scratch_partition: partition@74000 {
-			label = "image-scratch";
-			reg = <0x00074000 DT_SIZE_K(32)>;
-		};
-
 		/* Set 16 kB of storage at the end of the 1536 kB of flash */
-		storage_partition: partition@7c000 {
+		storage_partition: partition@74000 {
 			label = "storage";
 			reg = <0x0007c000 DT_SIZE_K(16)>;
 		};

boards/silabs/radio_boards/xg28_rb4401c/Kconfig.defconfig

@@ -0,0 +1,17 @@
+# Copyright (c) 2025 Shontal Biton
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_XG28_RB4401C
+
+config LOG_BACKEND_SWO_FREQ_HZ
+	default 875000
+	depends on LOG_BACKEND_SWO
+
+if SOC_GECKO_USE_RAIL
+
+config FPU
+	default y
+
+endif # SOC_GECKO_USE_RAIL
+
+endif # BOARD_XG28_RB4401C

boards/silabs/radio_boards/xg28_rb4401c/Kconfig.xg28_rb4401c

@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Shontal Biton
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_XG28_RB4401C
+	select SOC_PART_NUMBER_EFR32ZG28B322F1024IM68

boards/silabs/radio_boards/xg28_rb4401c/board.cmake

@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=EFR32ZG28BxxxF1024")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+
+board_runner_args(openocd)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+
+board_runner_args(silabs_commander "--device=EFR32ZG28B322F1024IM68")
+include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake)

boards/silabs/radio_boards/xg28_rb4401c/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: xg28_rb4401c
+  full_name: EFR32xG28 868-915 MHz 20 dBm (xG28-RB4401C)
+  vendor: silabs
+  socs:
+    - name: efr32zg28b322f1024im68

boards/silabs/radio_boards/xg28_rb4401c/doc/efr32zg28-xg28-rb4401c.jpg

@@ -0,0 +1,5 @@
+# Copyright (c) 2021 Linaro Limited
+# SPDX-License-Identifier: Apache-2.0
+
+# SPI is implemented via usart so node name isn't spi@...
+list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")

boards/silabs/radio_boards/xg28_rb4401c/doc/index.rst

@@ -0,0 +1,25 @@
+if {[info exists env(OPENOCD_INTERFACE)]} {
+	set INTERFACE $env(OPENOCD_INTERFACE)
+} else {
+	# By default connect over Debug USB port using the J-Link interface
+	set INTERFACE "jlink"
+}
+
+source [find interface/$INTERFACE.cfg]
+
+transport select swd
+
+set CHIPNAME efr32
+
+source [find target/efm32.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Debugger attaching: halting execution"
+	reset halt
+	gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+	echo "Debugger detaching: resuming execution"
+	resume
+}

boards/silabs/radio_boards/xg28_rb4401c/pre_dt_board.cmake

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2025 Shontal Biton
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/silabs/xg28-pinctrl.h>
+
+&pinctrl {
+	usart0_default: usart0_default {
+		group0 {
+			pins = <USART0_TX_PD11>;
+			drive-push-pull;
+			output-high;
+		};
+
+		group1 {
+			pins = <USART0_RX_PD12>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+};