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nashifkartben
nashif
authored and
kartben
committed
style: add missing curly braces in if/while/for statements.
Add missing curly braces in if/while/for statements. This is a style guideline we have that was not enforced in CI. All issues fixed here were detected by sonarqube SCA. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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23 files changed

+80
-55
lines changed

23 files changed

+80
-55
lines changed

‎arch/arc/core/prep_c.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -92,8 +92,8 @@ static void arc_cluster_scm_enable(void)
9292
/* Invalidate SCM before enabling. */
9393
arc_cln_write_reg_nolock(ARC_CLN_CACHE_CMD,
9494
ARC_CLN_CACHE_CMD_OP_REG_INV | ARC_CLN_CACHE_CMD_INCR);
95-
while (arc_cln_read_reg_nolock(ARC_CLN_CACHE_STATUS) & ARC_CLN_CACHE_STATUS_BUSY)
96-
;
95+
while (arc_cln_read_reg_nolock(ARC_CLN_CACHE_STATUS) & ARC_CLN_CACHE_STATUS_BUSY) {
96+
}
9797

9898
arc_cln_write_reg_nolock(ARC_CLN_CACHE_STATUS, ARC_CLN_CACHE_STATUS_EN);
9999
}

‎arch/arm64/core/fatal.c

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -207,24 +207,28 @@ static bool is_address_mapped(uint64_t *addr)
207207
{
208208
uintptr_t *phys = NULL;
209209

210-
if (*addr == 0U)
210+
if (*addr == 0U) {
211211
return false;
212+
}
212213

213214
/* Check alignment. */
214-
if ((*addr & (sizeof(uint32_t) - 1U)) != 0U)
215+
if ((*addr & (sizeof(uint32_t) - 1U)) != 0U) {
215216
return false;
217+
}
216218

217219
return !arch_page_phys_get((void *) addr, phys);
218220
}
219221

220222
static bool is_valid_jump_address(uint64_t *addr)
221223
{
222-
if (*addr == 0U)
224+
if (*addr == 0U) {
223225
return false;
226+
}
224227

225228
/* Check alignment. */
226-
if ((*addr & (sizeof(uint32_t) - 1U)) != 0U)
229+
if ((*addr & (sizeof(uint32_t) - 1U)) != 0U) {
227230
return false;
231+
}
228232

229233
return ((*addr >= (uint64_t)__text_region_start) &&
230234
(*addr <= (uint64_t)(__text_region_end)));
@@ -266,8 +270,9 @@ static void walk_stackframe(arm64_stacktrace_cb cb, void *cookie, const struct a
266270
if (!is_address_mapped(fp))
267271
break;
268272
lr = fp[1];
269-
if (!is_valid_jump_address(&lr))
273+
if (!is_valid_jump_address(&lr)) {
270274
break;
275+
}
271276
if (!cb(cookie, lr, fp)) {
272277
break;
273278
}

‎arch/xtensa/core/elf.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,8 +52,9 @@ static void xtensa_elf_relocate(struct llext_loader *ldr, struct llext *ext,
5252
for (sh_ndx = 0; sh_ndx < ext->sect_cnt; sh_ndx++) {
5353
if (ext->sect_hdrs[sh_ndx].sh_addr <= *got_entry &&
5454
*got_entry <
55-
ext->sect_hdrs[sh_ndx].sh_addr + ext->sect_hdrs[sh_ndx].sh_size)
55+
ext->sect_hdrs[sh_ndx].sh_addr + ext->sect_hdrs[sh_ndx].sh_size) {
5656
break;
57+
}
5758
}
5859

5960
if (sh_ndx == ext->sect_cnt) {

‎drivers/clock_control/clock_control_npcm.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -343,8 +343,8 @@ static int npcm_clock_control_init(const struct device *dev)
343343
/* Load M and N values into the frequency multiplier */
344344
priv->hfcgctrl |= BIT(NPCM_HFCGCTRL_LOAD);
345345
/* Wait for stable */
346-
while (sys_test_bit(priv->hfcgctrl, NPCM_HFCGCTRL_CLK_CHNG))
347-
;
346+
while (sys_test_bit(priv->hfcgctrl, NPCM_HFCGCTRL_CLK_CHNG)) {
347+
}
348348
}
349349

350350
/* Set all clock prescalers of core and peripherals. */

‎drivers/clock_control/clock_control_si32_pll.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -80,8 +80,8 @@ static int clock_control_si32_pll_on(const struct device *dev, clock_control_sub
8080
SI32_PLL_A_select_dco_frequency_lock_mode(config->pll);
8181
while (!(SI32_PLL_A_is_locked(config->pll) ||
8282
SI32_PLL_A_is_saturation_low_interrupt_pending(config->pll) ||
83-
SI32_PLL_A_is_saturation_high_interrupt_pending(config->pll)))
84-
;
83+
SI32_PLL_A_is_saturation_high_interrupt_pending(config->pll))) {
84+
}
8585

8686
return 0;
8787
}

‎drivers/counter/counter_renesas_ra_agt.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -73,8 +73,8 @@ static int counter_ra_agt_start(const struct device *dev)
7373

7474
reg->AGTCR = AGT_AGTCR_START_TIMER;
7575

76-
while (!(reg->AGTCR & BIT(R_AGTX0_AGT16_CTRL_AGTCR_TCSTF_Pos)) && likely(--timeout))
77-
;
76+
while (!(reg->AGTCR & BIT(R_AGTX0_AGT16_CTRL_AGTCR_TCSTF_Pos)) && likely(--timeout)) {
77+
}
7878

7979
return timeout > 0 ? 0 : -EIO;
8080
}
@@ -86,8 +86,8 @@ static int counter_ra_agt_stop(const struct device *dev)
8686

8787
reg->AGTCR = AGT_AGTCR_STOP_TIMER;
8888

89-
while ((reg->AGTCR & BIT(R_AGTX0_AGT16_CTRL_AGTCR_TCSTF_Pos)) && likely(--timeout))
90-
;
89+
while ((reg->AGTCR & BIT(R_AGTX0_AGT16_CTRL_AGTCR_TCSTF_Pos)) && likely(--timeout)) {
90+
}
9191

9292
return timeout > 0 ? 0 : -EIO;
9393
}

‎drivers/dma/dma_mcux_edma.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -659,8 +659,9 @@ static int dma_mcux_edma_reload(const struct device *dev, uint32_t channel,
659659

660660
/* Previous TCD index in circular list */
661661
pre_idx = data->transfer_settings.write_idx - 1;
662-
if (pre_idx >= CONFIG_DMA_TCD_QUEUE_SIZE)
662+
if (pre_idx >= CONFIG_DMA_TCD_QUEUE_SIZE) {
663663
pre_idx = CONFIG_DMA_TCD_QUEUE_SIZE - 1;
664+
}
664665

665666
/* Configure a TCD for the transfer */
666667
tcd = &(DEV_CFG(dev)->tcdpool[channel][data->transfer_settings.write_idx]);

‎drivers/dma/dma_nxp_sdma.c

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -82,12 +82,13 @@ static int dma_nxp_sdma_consume(struct sdma_channel_data *chan_data, uint32_t by
8282
chan_data->stat.read_position += bytes;
8383
chan_data->stat.read_position %= chan_data->capacity;
8484

85-
if (chan_data->stat.read_position > chan_data->stat.write_position)
85+
if (chan_data->stat.read_position > chan_data->stat.write_position) {
8686
chan_data->stat.free = chan_data->stat.read_position -
8787
chan_data->stat.write_position;
88-
else
88+
} else {
8989
chan_data->stat.free = chan_data->capacity -
9090
(chan_data->stat.write_position - chan_data->stat.read_position);
91+
}
9192

9293
chan_data->stat.pending_length = chan_data->capacity - chan_data->stat.free;
9394

@@ -102,12 +103,13 @@ static int dma_nxp_sdma_produce(struct sdma_channel_data *chan_data, uint32_t by
102103
chan_data->stat.write_position += bytes;
103104
chan_data->stat.write_position %= chan_data->capacity;
104105

105-
if (chan_data->stat.write_position > chan_data->stat.read_position)
106+
if (chan_data->stat.write_position > chan_data->stat.read_position) {
106107
chan_data->stat.pending_length = chan_data->stat.write_position -
107108
chan_data->stat.read_position;
108-
else
109+
} else {
109110
chan_data->stat.pending_length = chan_data->capacity -
110111
(chan_data->stat.read_position - chan_data->stat.write_position);
112+
}
111113

112114
chan_data->stat.free = chan_data->capacity - chan_data->stat.pending_length;
113115

@@ -389,13 +391,15 @@ static int dma_nxp_sdma_reload(const struct device *dev, uint32_t channel, uint3
389391

390392
chan_data = &dev_data->chan[channel];
391393

392-
if (!size)
394+
if (!size) {
393395
return 0;
396+
}
394397

395-
if (chan_data->direction == MEMORY_TO_PERIPHERAL)
398+
if (chan_data->direction == MEMORY_TO_PERIPHERAL) {
396399
dma_nxp_sdma_produce(chan_data, size);
397-
else
400+
} else {
398401
dma_nxp_sdma_consume(chan_data, size);
402+
}
399403

400404
return 0;
401405
}
@@ -424,11 +428,13 @@ static bool sdma_channel_filter(const struct device *dev, int chan_id, void *par
424428
struct sdma_dev_data *dev_data = dev->data;
425429

426430
/* chan 0 is reserved for boot channel */
427-
if (chan_id == 0)
431+
if (chan_id == 0) {
428432
return false;
433+
}
429434

430-
if (chan_id >= FSL_FEATURE_SDMA_MODULE_CHANNEL)
435+
if (chan_id >= FSL_FEATURE_SDMA_MODULE_CHANNEL) {
431436
return false;
437+
}
432438

433439
dev_data->chan[chan_id].event_source = *((int *)param);
434440
dev_data->chan[chan_id].index = chan_id;

‎drivers/espi/espi_npcx.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -997,11 +997,12 @@ static int espi_npcx_send_oob(const struct device *dev,
997997

998998
/* Write GET_OOB data into 32-bits tx buffer in little endian */
999999
for (idx_tx_buf = 0; idx_tx_buf < sz_oob_tx/4; idx_tx_buf++,
1000-
oob_buf += 4)
1000+
oob_buf += 4) {
10011001
inst->OOBTXBUF[idx_tx_buf + 1] = oob_buf[0]
10021002
| (oob_buf[1] << 8)
10031003
| (oob_buf[2] << 16)
10041004
| (oob_buf[3] << 24);
1005+
}
10051006

10061007
/* Write remaining bytes of package */
10071008
if (sz_oob_tx % 4) {

‎drivers/i2s/i2s_ll_stm32.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -274,10 +274,11 @@ static int i2s_stm32_configure(const struct device *dev, enum i2s_dir dir,
274274
}
275275

276276
/* set I2S clock polarity */
277-
if ((i2s_cfg->format & I2S_FMT_CLK_FORMAT_MASK) == I2S_FMT_BIT_CLK_INV)
277+
if ((i2s_cfg->format & I2S_FMT_CLK_FORMAT_MASK) == I2S_FMT_BIT_CLK_INV) {
278278
LL_I2S_SetClockPolarity(cfg->i2s, LL_I2S_POLARITY_HIGH);
279-
else
279+
} else {
280280
LL_I2S_SetClockPolarity(cfg->i2s, LL_I2S_POLARITY_LOW);
281+
}
281282

282283
stream->state = I2S_STATE_READY;
283284
return 0;

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