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The async_user_callback could be triggered from
both the DMA transfer complete interrupt and
a k_work queue timeout. Since the timeout runs
outside of an ISR context, it could be interrupted
by the DMA ISR. This might leads to a race condition
where both paths access and modify shared
DMA buffer state (offset and length) simultaneously,
causing data corruption or out-of-sequence processing.
Introduces proper synchronization to prevent concurrent
access to shared DMA buffer variables,
ensuring consistent and reliable data handling.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
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