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soc: add realtek amebad SOC integration
Add initial version of Amebad Soc integration Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
1 parent 918eb1c commit 23abfbe

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soc/realtek/ameba/CMakeLists.txt

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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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zephyr_include_directories(common)
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add_subdirectory(common)
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add_subdirectory(${CONFIG_SOC})

soc/realtek/ameba/Kconfig

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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FAMILY_REALTEK_AMEBA
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select BUILD_OUTPUT_HEX
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select SOC_EARLY_INIT_HOOK
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if SOC_FAMILY_REALTEK_AMEBA
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rsource "*/Kconfig"
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endif # SOC_FAMILY_REALTEK_AMEBA

soc/realtek/ameba/Kconfig.defconfig

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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_FAMILY_REALTEK_AMEBA
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rsource "*/Kconfig.defconfig"
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endif # SOC_FAMILY_REALTEK_AMEBA

soc/realtek/ameba/Kconfig.soc

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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FAMILY_REALTEK_AMEBA
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bool
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config SOC_FAMILY
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default "realtek_ameba" if SOC_FAMILY_REALTEK_AMEBA
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rsource "*/Kconfig.soc"
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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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zephyr_include_directories(${ZEPHYR_BASE}/drivers)
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zephyr_include_directories(.)
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zephyr_sources(soc.c)
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zephyr_linker_sources(SECTIONS boot_section.ld)
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")
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zephyr_link_libraries(
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-T${CMAKE_CURRENT_SOURCE_DIR}/ameba_rom_symbol_acut.ld
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)

soc/realtek/ameba/amebad/Kconfig

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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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config SOC_AMEBAD
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select ARM
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select CPU_CORTEX_M33
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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select CPU_HAS_ARM_SAU
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select CPU_HAS_FPU
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select CPU_HAS_VFP
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select ARMV8_M_DSP
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select CPU_HAS_ARM_MPU
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select ARM_MPU
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select ARM_TRUSTZONE_M
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select ARM_ON_EXIT_CPU_IDLE
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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_AMEBAD
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config NUM_IRQS
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default 64
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,/clocks/clk_sys,clock-frequency)
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config CACHE_MANAGEMENT
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default y
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endif #SOC_AMEBAD

soc/realtek/ameba/amebad/Kconfig.soc

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# Copyright (c) 2024 Realtek Semiconductor Corp.
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# SPDX-License-Identifier: Apache-2.0
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config SOC_AMEBAD
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bool
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select SOC_FAMILY_REALTEK_AMEBA
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config SOC
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default "amebad" if SOC_AMEBAD
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/*
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* Copyright (c) 2024 Realtek Semiconductor Corp.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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SECTION_PROLOGUE(.ram_image2.entry,,SUBALIGN(32))
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{
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__image2_entry_func__ = .;
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KEEP(*(SORT(.image2.entry.data*)))
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. = ALIGN(32);
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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SECTION_PROLOGUE(.psram_image2.text.data,,)
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{
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__image2_backtrace_start__ = .;
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*(*.sramdram.only.text)
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. = ALIGN (4);
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__ipc_table_start__ = .;
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KEEP(*(*.ipc.table.data*))
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__ipc_table_end__ = .;
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/*-----------------*/
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__image2_backtrace_end__ = .;
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. = ALIGN (32);
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} GROUP_LINK_IN(ROMABLE_REGION)

soc/realtek/ameba/amebad/soc.c

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/*
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* Copyright (c) 2024 Realtek Semiconductor Corp.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <soc.h>
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#include <ameba_soc.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/kernel.h>
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#include <zephyr/cache.h>
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#include "ameba_system.h"
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void z_arm_reset(void);
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IMAGE2_ENTRY_SECTION
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RAM_START_FUNCTION Img2EntryFun0 = {z_arm_reset, NULL, /* BOOT_RAM_WakeFromPG, */
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(uint32_t)NewVectorTable};
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static void app_vdd1833_detect(void)
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{
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u32 temp;
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if (FALSE == is_power_supply18()) {
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temp = HAL_READ32(SYSTEM_CTRL_BASE_HP, REG_HS_RFAFE_IND_VIO1833);
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temp |= BIT_RFAFE_IND_VIO1833;
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HAL_WRITE32(SYSTEM_CTRL_BASE_HP, REG_HS_RFAFE_IND_VIO1833, temp);
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}
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printk("REG_HS_RFAFE_IND_VIO1833 (0 is 1.8V): %x\n",
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HAL_READ32(SYSTEM_CTRL_BASE_HP, REG_HS_RFAFE_IND_VIO1833));
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}
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void soc_early_init_hook(void)
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{
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/*
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* Cache is enabled by default at reset, disable it before
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* sys_cache*-functions can enable them.
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*/
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Cache_Enable(DISABLE);
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sys_cache_data_enable();
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sys_cache_instr_enable();
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SystemSetCpuClk(CLK_KM4_200M);
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app_vdd1833_detect();
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}

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