drivers: serial: pl011: Add support for Ambiq Apollo510 SoC UART

Added more clock sources for Apollo510 support

Signed-off-by: Hao Luo <hluo@ambiq.com>

Author: AlessandroLuo

drivers/serial/uart_pl011.c

@@ -38,7 +38,7 @@
 #include "uart_pl011_ambiq.h"
 #endif
 
-#if defined(CONFIG_SOC_SERIES_APOLLO3X)
+#if defined(CONFIG_SOC_SERIES_APOLLO3X) || defined(CONFIG_SOC_SERIES_APOLLO5X)
 #define PM_INST_GET(n) PM_DEVICE_DT_INST_GET(n)
 #else
 #define PM_INST_GET(n) NULL

drivers/serial/uart_pl011_ambiq.h

@@ -37,6 +37,16 @@ static inline int pl011_ambiq_clk_set(const struct device *dev, uint32_t clk)
 	case 24000000:
 		clksel = PL011_CR_AMBIQ_CLKSEL_24MHZ;
 		break;
+#if !defined(CONFIG_SOC_SERIES_APOLLO3X)
+	case 48000000:
+		clksel = PL011_CR_AMBIQ_CLKSEL_48MHZ;
+		break;
+#if !defined(CONFIG_SOC_SERIES_APOLLO4X)
+	case AM_HAL_UART_PLLCLK_FREQ:
+		clksel = PL011_CR_AMBIQ_CLKSEL_PLL;
+		break;
+#endif
+#endif
 	default:
 		return -EINVAL;
 	}

drivers/serial/uart_pl011_registers.h

@@ -114,6 +114,7 @@ volatile struct pl011_regs *get_uart(const struct device *dev)
 #define PL011_CR_AMBIQ_CLKSEL_6MHZ	3
 #define PL011_CR_AMBIQ_CLKSEL_3MHZ	4
 #define PL011_CR_AMBIQ_CLKSEL_48MHZ	5
+#define PL011_CR_AMBIQ_CLKSEL_PLL	6
 
 /* PL011 Interrupt Fifo Level Select Register */
 #define PL011_IFLS_RXIFLSEL_M	GENMASK(5, 3)