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1 parent 2ac66bc commit 1cfcdcbCopy full SHA for 1cfcdcb
dts/arm/st/u3/stm32u3.dtsi
@@ -14,6 +14,7 @@
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/ {
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chosen {
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+ zephyr,entropy = &rng;
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zephyr,flash-controller = &flash;
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};
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@@ -273,6 +274,14 @@
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#io-channel-cells = <1>;
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status = "disabled";
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+
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+ rng: rng@420c0800 {
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+ compatible = "st,stm32-rng";
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+ reg = <0x420c0800 0x400>;
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+ clocks = <&rcc STM32_CLOCK(AHB2, 18)>;
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+ interrupts = <94 0>;
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+ status = "disabled";
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+ };
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