@@ -138,6 +138,28 @@ static void __ISR__ reserved_isr(void)
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REGISTER_RESTORE_EXIT ();
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}
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+ static void __ISR__ INT_RuntimeFatalInterrupt (void )
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+ {
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+ REGISTER_SAVE ();
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+ ISR_DIRECT_HEADER ();
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+
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+ uint32_t reason ;
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+ const struct arch_esf * esf ;
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+
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+ /* Read the current values of CPU registers r1 and r0 into C variables
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+ * 'reason' is expected to contain the exception reason (from r1)
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+ * 'esf' is expected to contain a pointer to the exception stack frame (from r0)
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+ */
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+ __asm__ volatile ("mov r1, %0\n\t"
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+ "mov r0, %1\n\t"
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+ : "=r" (reason ), "=r" (esf ));
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+
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+ z_rx_fatal_error (reason , esf );
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+
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+ ISR_DIRECT_FOOTER (0 );
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+ REGISTER_RESTORE_EXIT ();
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+ }
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+
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/* wrapper for z_rx_context_switch_isr, defined in switch.S */
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extern void __ISR__ switch_isr_wrapper (void );
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@@ -444,56 +466,90 @@ const void *FixedVectors[] FVECT_SECT = {
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};
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const fp RelocatableVectors [] RVECT_SECT = {
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- reserved_isr , switch_isr_wrapper , reserved_isr , reserved_isr , reserved_isr ,
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- reserved_isr , reserved_isr , reserved_isr , reserved_isr , reserved_isr ,
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- reserved_isr , reserved_isr , reserved_isr , reserved_isr , reserved_isr ,
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- reserved_isr , int_demux_16 , int_demux_17 , int_demux_18 , int_demux_19 ,
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- int_demux_20 , int_demux_21 , int_demux_22 , int_demux_23 , int_demux_24 ,
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- int_demux_25 , int_demux_26 , int_demux_27 , int_demux_28 , int_demux_29 ,
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- int_demux_30 , int_demux_31 , int_demux_32 , int_demux_33 , int_demux_34 ,
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- int_demux_35 , int_demux_36 , int_demux_37 , int_demux_38 , int_demux_39 ,
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- int_demux_40 , int_demux_41 , int_demux_42 , int_demux_43 , int_demux_44 ,
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- int_demux_45 , int_demux_46 , int_demux_47 , int_demux_48 , int_demux_49 ,
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- int_demux_50 , int_demux_51 , int_demux_52 , int_demux_53 , int_demux_54 ,
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- int_demux_55 , int_demux_56 , int_demux_57 , int_demux_58 , int_demux_59 ,
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- int_demux_60 , int_demux_61 , int_demux_62 , int_demux_63 , int_demux_64 ,
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- int_demux_65 , int_demux_66 , int_demux_67 , int_demux_68 , int_demux_69 ,
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- int_demux_70 , int_demux_71 , int_demux_72 , int_demux_73 , int_demux_74 ,
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- int_demux_75 , int_demux_76 , int_demux_77 , int_demux_78 , int_demux_79 ,
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- int_demux_80 , int_demux_81 , int_demux_82 , int_demux_83 , int_demux_84 ,
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- int_demux_85 , int_demux_86 , int_demux_87 , int_demux_88 , int_demux_89 ,
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- int_demux_90 , int_demux_91 , int_demux_92 , int_demux_93 , int_demux_94 ,
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- int_demux_95 , int_demux_96 , int_demux_97 , int_demux_98 , int_demux_99 ,
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- int_demux_100 , int_demux_101 , int_demux_102 , int_demux_103 , int_demux_104 ,
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- int_demux_105 , int_demux_106 , int_demux_107 , int_demux_108 , int_demux_109 ,
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- int_demux_110 , int_demux_111 , int_demux_112 , int_demux_113 , int_demux_114 ,
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- int_demux_115 , int_demux_116 , int_demux_117 , int_demux_118 , int_demux_119 ,
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- int_demux_120 , int_demux_121 , int_demux_122 , int_demux_123 , int_demux_124 ,
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- int_demux_125 , int_demux_126 , int_demux_127 , int_demux_128 , int_demux_129 ,
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- int_demux_130 , int_demux_131 , int_demux_132 , int_demux_133 , int_demux_134 ,
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- int_demux_135 , int_demux_136 , int_demux_137 , int_demux_138 , int_demux_139 ,
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- int_demux_140 , int_demux_141 , int_demux_142 , int_demux_143 , int_demux_144 ,
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- int_demux_145 , int_demux_146 , int_demux_147 , int_demux_148 , int_demux_149 ,
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- int_demux_150 , int_demux_151 , int_demux_152 , int_demux_153 , int_demux_154 ,
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- int_demux_155 , int_demux_156 , int_demux_157 , int_demux_158 , int_demux_159 ,
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- int_demux_160 , int_demux_161 , int_demux_162 , int_demux_163 , int_demux_164 ,
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- int_demux_165 , int_demux_166 , int_demux_167 , int_demux_168 , int_demux_169 ,
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- int_demux_170 , int_demux_171 , int_demux_172 , int_demux_173 , int_demux_174 ,
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- int_demux_175 , int_demux_176 , int_demux_177 , int_demux_178 , int_demux_179 ,
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- int_demux_180 , int_demux_181 , int_demux_182 , int_demux_183 , int_demux_184 ,
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- int_demux_185 , int_demux_186 , int_demux_187 , int_demux_188 , int_demux_189 ,
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- int_demux_190 , int_demux_191 , int_demux_192 , int_demux_193 , int_demux_194 ,
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- int_demux_195 , int_demux_196 , int_demux_197 , int_demux_198 , int_demux_199 ,
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- int_demux_200 , int_demux_201 , int_demux_202 , int_demux_203 , int_demux_204 ,
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- int_demux_205 , int_demux_206 , int_demux_207 , int_demux_208 , int_demux_209 ,
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- int_demux_210 , int_demux_211 , int_demux_212 , int_demux_213 , int_demux_214 ,
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- int_demux_215 , int_demux_216 , int_demux_217 , int_demux_218 , int_demux_219 ,
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- int_demux_220 , int_demux_221 , int_demux_222 , int_demux_223 , int_demux_224 ,
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- int_demux_225 , int_demux_226 , int_demux_227 , int_demux_228 , int_demux_229 ,
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- int_demux_230 , int_demux_231 , int_demux_232 , int_demux_233 , int_demux_234 ,
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- int_demux_235 , int_demux_236 , int_demux_237 , int_demux_238 , int_demux_239 ,
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- int_demux_240 , int_demux_241 , int_demux_242 , int_demux_243 , int_demux_244 ,
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- int_demux_245 , int_demux_246 , int_demux_247 , int_demux_248 , int_demux_249 ,
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- int_demux_250 , int_demux_251 , int_demux_252 , int_demux_253 , int_demux_254 ,
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+ reserved_isr , switch_isr_wrapper , INT_RuntimeFatalInterrupt ,
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+ reserved_isr , reserved_isr , reserved_isr ,
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+ reserved_isr , reserved_isr , reserved_isr ,
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+ reserved_isr , reserved_isr , reserved_isr ,
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+ reserved_isr , reserved_isr , reserved_isr ,
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+ reserved_isr , int_demux_16 , int_demux_17 ,
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+ int_demux_18 , int_demux_19 , int_demux_20 ,
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+ int_demux_21 , int_demux_22 , int_demux_23 ,
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+ int_demux_24 , int_demux_25 , int_demux_26 ,
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+ int_demux_27 , int_demux_28 , int_demux_29 ,
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+ int_demux_30 , int_demux_31 , int_demux_32 ,
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+ int_demux_33 , int_demux_34 , int_demux_35 ,
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+ int_demux_36 , int_demux_37 , int_demux_38 ,
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+ int_demux_39 , int_demux_40 , int_demux_41 ,
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+ int_demux_42 , int_demux_43 , int_demux_44 ,
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+ int_demux_45 , int_demux_46 , int_demux_47 ,
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+ int_demux_48 , int_demux_49 , int_demux_50 ,
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+ int_demux_51 , int_demux_52 , int_demux_53 ,
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+ int_demux_54 , int_demux_55 , int_demux_56 ,
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+ int_demux_57 , int_demux_58 , int_demux_59 ,
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+ int_demux_60 , int_demux_61 , int_demux_62 ,
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+ int_demux_63 , int_demux_64 , int_demux_65 ,
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+ int_demux_66 , int_demux_67 , int_demux_68 ,
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+ int_demux_69 , int_demux_70 , int_demux_71 ,
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+ int_demux_72 , int_demux_73 , int_demux_74 ,
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+ int_demux_75 , int_demux_76 , int_demux_77 ,
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+ int_demux_78 , int_demux_79 , int_demux_80 ,
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+ int_demux_81 , int_demux_82 , int_demux_83 ,
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+ int_demux_84 , int_demux_85 , int_demux_86 ,
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+ int_demux_87 , int_demux_88 , int_demux_89 ,
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+ int_demux_90 , int_demux_91 , int_demux_92 ,
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+ int_demux_93 , int_demux_94 , int_demux_95 ,
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+ int_demux_96 , int_demux_97 , int_demux_98 ,
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+ int_demux_99 , int_demux_100 , int_demux_101 ,
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+ int_demux_102 , int_demux_103 , int_demux_104 ,
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+ int_demux_105 , int_demux_106 , int_demux_107 ,
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+ int_demux_108 , int_demux_109 , int_demux_110 ,
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+ int_demux_111 , int_demux_112 , int_demux_113 ,
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+ int_demux_114 , int_demux_115 , int_demux_116 ,
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+ int_demux_117 , int_demux_118 , int_demux_119 ,
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+ int_demux_120 , int_demux_121 , int_demux_122 ,
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+ int_demux_123 , int_demux_124 , int_demux_125 ,
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+ int_demux_126 , int_demux_127 , int_demux_128 ,
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+ int_demux_129 , int_demux_130 , int_demux_131 ,
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+ int_demux_132 , int_demux_133 , int_demux_134 ,
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+ int_demux_135 , int_demux_136 , int_demux_137 ,
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+ int_demux_138 , int_demux_139 , int_demux_140 ,
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+ int_demux_141 , int_demux_142 , int_demux_143 ,
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+ int_demux_144 , int_demux_145 , int_demux_146 ,
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+ int_demux_147 , int_demux_148 , int_demux_149 ,
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+ int_demux_150 , int_demux_151 , int_demux_152 ,
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+ int_demux_153 , int_demux_154 , int_demux_155 ,
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+ int_demux_156 , int_demux_157 , int_demux_158 ,
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+ int_demux_159 , int_demux_160 , int_demux_161 ,
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+ int_demux_162 , int_demux_163 , int_demux_164 ,
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+ int_demux_165 , int_demux_166 , int_demux_167 ,
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+ int_demux_168 , int_demux_169 , int_demux_170 ,
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+ int_demux_171 , int_demux_172 , int_demux_173 ,
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+ int_demux_174 , int_demux_175 , int_demux_176 ,
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+ int_demux_177 , int_demux_178 , int_demux_179 ,
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+ int_demux_180 , int_demux_181 , int_demux_182 ,
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+ int_demux_183 , int_demux_184 , int_demux_185 ,
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+ int_demux_186 , int_demux_187 , int_demux_188 ,
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+ int_demux_189 , int_demux_190 , int_demux_191 ,
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+ int_demux_192 , int_demux_193 , int_demux_194 ,
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+ int_demux_195 , int_demux_196 , int_demux_197 ,
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+ int_demux_198 , int_demux_199 , int_demux_200 ,
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+ int_demux_201 , int_demux_202 , int_demux_203 ,
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+ int_demux_204 , int_demux_205 , int_demux_206 ,
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+ int_demux_207 , int_demux_208 , int_demux_209 ,
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+ int_demux_210 , int_demux_211 , int_demux_212 ,
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+ int_demux_213 , int_demux_214 , int_demux_215 ,
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+ int_demux_216 , int_demux_217 , int_demux_218 ,
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+ int_demux_219 , int_demux_220 , int_demux_221 ,
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+ int_demux_222 , int_demux_223 , int_demux_224 ,
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+ int_demux_225 , int_demux_226 , int_demux_227 ,
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+ int_demux_228 , int_demux_229 , int_demux_230 ,
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+ int_demux_231 , int_demux_232 , int_demux_233 ,
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+ int_demux_234 , int_demux_235 , int_demux_236 ,
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+ int_demux_237 , int_demux_238 , int_demux_239 ,
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+ int_demux_240 , int_demux_241 , int_demux_242 ,
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+ int_demux_243 , int_demux_244 , int_demux_245 ,
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+ int_demux_246 , int_demux_247 , int_demux_248 ,
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+ int_demux_249 , int_demux_250 , int_demux_251 ,
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+ int_demux_252 , int_demux_253 , int_demux_254 ,
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int_demux_255 ,
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555
};
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