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| 1 | +/* |
| 2 | + * Copyright 2025 NXP |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#include <stdio.h> |
| 8 | +#include <zephyr/init.h> |
| 9 | +#include <zephyr/kernel.h> |
| 10 | +#include <zephyr/device.h> |
| 11 | +#include <zephyr/drivers/firmware/scmi/clk.h> |
| 12 | +#include <zephyr/dt-bindings/clock/imx95_clock.h> |
| 13 | +#include <soc.h> |
| 14 | + |
| 15 | +#define FREQ_24M_HZ 24000000 /* 24 MHz */ |
| 16 | + |
| 17 | +static int soc_clk_init(void) |
| 18 | +{ |
| 19 | +#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) || \ |
| 20 | + DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) |
| 21 | + const struct device *clk_dev = DEVICE_DT_GET(DT_NODELABEL(scmi_clk)); |
| 22 | + struct scmi_protocol *proto = clk_dev->data; |
| 23 | + struct scmi_clock_rate_config clk_cfg = {0}; |
| 24 | + uint32_t clk_id; |
| 25 | + struct scmi_clock_config cfg; |
| 26 | + int ret; |
| 27 | + |
| 28 | +#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) |
| 29 | + clk_id = IMX95_CLK_LPUART1; |
| 30 | +#elif DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) |
| 31 | + clk_id = IMX95_CLK_LPUART3; |
| 32 | +#endif |
| 33 | + |
| 34 | + ret = scmi_clock_parent_set(proto, clk_id, IMX95_CLK_24M); |
| 35 | + if (ret) { |
| 36 | + return ret; |
| 37 | + } |
| 38 | + |
| 39 | + cfg.attributes = SCMI_CLK_CONFIG_ENABLE_DISABLE(true); |
| 40 | + cfg.clk_id = clk_id; |
| 41 | + ret = scmi_clock_config_set(proto, &cfg); |
| 42 | + if (ret) { |
| 43 | + return ret; |
| 44 | + } |
| 45 | + |
| 46 | + clk_cfg.flags = SCMI_CLK_RATE_SET_FLAGS_ROUNDS_AUTO; |
| 47 | + clk_cfg.clk_id = clk_id; |
| 48 | + clk_cfg.rate[0] = FREQ_24M_HZ; /* 24 MHz*/ |
| 49 | + clk_cfg.rate[1] = 0; |
| 50 | + |
| 51 | + ret = scmi_clock_rate_set(proto, &clk_cfg); |
| 52 | + if (ret) { |
| 53 | + return ret; |
| 54 | + } |
| 55 | +#endif |
| 56 | + |
| 57 | + return 0; |
| 58 | +} |
| 59 | + |
| 60 | +static int soc_init(void) |
| 61 | +{ |
| 62 | + return soc_clk_init(); |
| 63 | +} |
| 64 | +/* |
| 65 | + * Because platform is using ARM SCMI, drivers like scmi, mbox etc are |
| 66 | + * initialized during PRE_KERNEL_1, so common init hooks can't be used, SoC |
| 67 | + * early init and board early init should run during PRE_KERNEL_2 instead. |
| 68 | + */ |
| 69 | +SYS_INIT(soc_init, PRE_KERNEL_2, 0); |
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