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Nikolay Agishevcarlescufi
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ARC: Add HS4x support
Minimal HSDK4xD support Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
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23 files changed

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arch/arc/Kconfig

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,15 @@ config CPU_HS3X
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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help
90-
If y, the SoC uses an ARC HS3x or HS4x CPU
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If y, the SoC uses an ARC HS3x CPU
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config CPU_HS4X
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bool
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select CPU_ARCHS
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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help
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If y, the SoC uses an HS4X CPU
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endif #ISA_ARCV2
93101

@@ -278,8 +286,8 @@ config CODE_DENSITY
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Enable code density option to get better code density
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config ARC_HAS_ACCL_REGS
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bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
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default y if CPU_HS3X || CPU_HS5X || CPU_HS6X
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bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6 and/or DSP)"
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default y if CPU_HS3X || CPU_HS4X || CPU_HS5X || CPU_HS6X
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help
284292
Depending on the configuration, CPU can contain accumulator reg-pair
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(also referred to as r58:r59). These can also be used by gcc as GPR so
@@ -377,6 +385,13 @@ config ARC_EXCEPTION_DEBUG
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and parameters, at a cost of code/data size for the human-readable
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strings.
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config ARC_EARLY_SOC_INIT
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bool "Make early stage SoC-specific initialization"
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help
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Call SoC per-core setup code on early stage initialization
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(before C runtime initialization). Setup code is called in form of
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soc_early_asm_init_percpu assembler macro.
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endmenu
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config MAIN_STACK_SIZE

arch/arc/core/dsp/Kconfig

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,12 @@ config ARC_DSP
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help
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This option enables DSP and DSP instructions.
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config ARC_DSP_TURNED_OFF
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bool "Turn off DSP if it presents"
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depends on !ARC_DSP
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help
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This option disables DSP block via resetting DSP_CRTL register.
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1925
config ARC_DSP_SHARING
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bool "DSP register sharing"
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depends on ARC_DSP && MULTITHREADING

arch/arc/core/dsp/swap_dsp_macros.h

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Original file line numberDiff line numberDiff line change
@@ -260,3 +260,10 @@ dsp_skip_load :
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#endif
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agu_skip_load :
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.endm
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.macro _dsp_extension_probe
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#ifdef CONFIG_ARC_DSP_TURNED_OFF
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mov r0, 0 /* DSP_CTRL_DISABLED_ALL */
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sr r0, [_ARC_V2_DSP_CTRL]
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#endif
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.endm

arch/arc/core/reset.S

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Original file line numberDiff line numberDiff line change
@@ -16,6 +16,9 @@
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#include <zephyr/arch/cpu.h>
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#include <swap_macros.h>
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#include <zephyr/arch/arc/asm-compat/assembler.h>
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#ifdef CONFIG_ARC_EARLY_SOC_INIT
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#include <soc_ctrl.h>
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#endif
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GDATA(z_interrupt_stacks)
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GDATA(z_main_stack)
@@ -109,6 +112,12 @@ done_icache_invalidate:
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done_dcache_invalidate:
111114

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#ifdef CONFIG_ARC_EARLY_SOC_INIT
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soc_early_asm_init_percpu
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#endif
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_dsp_extension_probe
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/*
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* Init ARC internal architecture state
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* Force to initialize internal architecture state to reset values

boards/arc/hsdk4xd/CMakeLists.txt

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@@ -0,0 +1,5 @@
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#
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# Copyright (c) 2023 Synopsys, Inc. All rights reserved.
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#
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# SPDX-License-Identifier: Apache-2.0
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#

boards/arc/hsdk4xd/Kconfig.board

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@@ -0,0 +1,13 @@
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# DesignWare ARC HSDK4XD Development Kit board configuration
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# Copyright (c) 2023 Synopsys, Inc. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_HSDK4XD
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bool "ARC HSDK4XD Development Kit"
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depends on SOC_ARC_HSDK4XD
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help
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The ARC HS4x/4xD Development Kit is a ready-to-use software development
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platform for the ARC HS4x/4xD family of processor IP. It includes
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a multicore ARC HS4x/HS4xD-based chip and integrates a wide range
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of interfaces.

boards/arc/hsdk4xd/Kconfig.defconfig

Lines changed: 9 additions & 0 deletions
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@@ -0,0 +1,9 @@
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# Copyright (c) 2023 Synopsys, Inc. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_HSDK4XD
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config BOARD
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default "hsdk4xd"
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endif #BOARD_HSDK4XD

boards/arc/hsdk4xd/board.cmake

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@@ -0,0 +1,6 @@
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(openocd "--use-elf")
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board_runner_args(mdb-hw "--jtag=digilent" "--cores=${CONFIG_MP_MAX_NUM_CPUS}")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)

boards/arc/hsdk4xd/hsdk4xd.dts

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@@ -0,0 +1,14 @@
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/*
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* Copyright (c) 2023, Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include "hsdk4xd.dtsi"
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/ {
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model = "hsdk4xd";
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compatible = "snps,hsdk4xd";
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};

boards/arc/hsdk4xd/hsdk4xd.dtsi

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@@ -0,0 +1,34 @@
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/*
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* Copyright (c) 2023, Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <synopsys/arc_hs4xd.dtsi>
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/ {
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aliases {
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uart-dbg = &uart_dbg;
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};
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chosen {
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zephyr,sram = &ddr0;
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zephyr,console = &uart_dbg;
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zephyr,shell-uart = &uart_dbg;
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};
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};
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arduino_spi: &spi2 {};
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27+
&uart_dbg {
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status = "okay";
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current-speed = <115200>;
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};
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&creg_gpio {
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status = "okay";
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};

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