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board: add support for VCC-GND STM32H750VB
YD-STM23H750VB board has 128 Kbytes of flash memory, 1 Mbytes of SRAM and 16 Mbytes onboard SPI norflash. Signed-off-by: John Sanpe <sanpeqf@gmail.com>
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‎boards/vcc-gnd/yd_stm32h750vb/Kconfig.defconfig

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# YD-STM32H750VB board configuration
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# Copyright(c) 2024 John Sanpe <sanpeqf@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_YD_STM32H750VB
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config DISK_DRIVER_SDMMC
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default y if DISK_DRIVERS
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endif # BOARD_YD_STM32H750VB

‎boards/vcc-gnd/yd_stm32h750vb/Kconfig.yd_stm32h750vb

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# YD-STM32H750VB board configuration
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# Copyright(c) 2024 John Sanpe <sanpeqf@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_YD_STM32H750VB
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select SOC_STM32H750XX

‎boards/vcc-gnd/yd_stm32h750vb/board.cmake

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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse")
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board_runner_args(jlink "--device=STM32H735IG" "--speed=4000")
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board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/vcc-gnd/yd_stm32h750vb/board.yml

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board:
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name: yd_stm32h750vb
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vendor: vcc-gnd
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socs:
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- name: stm32h750xx

‎boards/vcc-gnd/yd_stm32h750vb/doc/img/yd_stm32h750vb.png

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‎boards/vcc-gnd/yd_stm32h750vb/doc/index.rst

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.. _yd_stm32h750vb:
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YD-STM32H750VB
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##############
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Overview
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********
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The YD-STM32H750VB development board is a complete demonstration and development
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platform for Arm |reg| Cortex |reg|-M7 core-based STM32H750VBT6 microcontroller, with
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128Kbytes of Flash memory and 1 Mbytes of SRAM.
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.. image:: img/yd_stm32h750vb.png
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:align: center
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:alt: YD-STM32H750VB
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More information about STM32H750 can be found here:
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- `STM32H750 on www.st.com`_
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- `STM32H750xx reference manual`_
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- `STM32H750xx datasheet`_
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Supported Features
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==================
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The current Zephyr YD-STM32H750VB board supports the following features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| CLOCK | on-chip | reset and clock control |
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+-----------+------------+-------------------------------------+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on Zephyr porting.
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The default configuration can be found in the defconfig file:
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:zephyr_file:`boards/vcc-gnd/yd_stm32h750vb/yd_stm32h750vb_defconfig`
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Pin Mapping
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===========
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_1_TX : PA9
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- UART_1_RX : PA10
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- LED_1 : PA13 (SWDIO)
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- LED_2 : PA14 (SWCLK)
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- LED_3 : PA15
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- LED_4 : PB4
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- KEY : PB3
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System Clock
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============
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The STM32H750VB System Clock can be driven by an internal or external oscillator,
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as well as by the main PLL clock. By default, the System clock
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is driven by the PLL clock at 480MHz. PLL clock is feed by a 25MHz high speed external clock.
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Flashing
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========
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There are 2 main entry points for flashing STM32H750VB SoCs, one using the ROM
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bootloader, and another by using the SWD debug port (which requires additional
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hardware such as ST-Link). Flashing using the ROM bootloader requires a special activation
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pattern, which can be triggered by using the BOOT0 button.
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Installing dfu-util
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-------------------
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It is recommended to use at least v0.8 of `dfu-util`_. The package available in
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debian/ubuntu can be quite old, so you might have to build dfu-util from source.
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There is also a Windows version which works, but you may have to install the
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right USB drivers with a tool like `Zadig`_.
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Flashing an application to YD-STM32H750VB
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-----------------------------------------
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Connect a USB-C cable and the board should power ON. Force the board into DFU mode
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by keeping the BOOT0 switch pressed while pressing and releasing the RST switch.
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The dfu-util runner is supported on this board and so a sample can be built and
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tested easily.
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Here is an example for the :zephyr:code-sample:`blinky` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: yd_stm32h750vb
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:goals: build flash
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You will see the LED blinking every second.
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: yd_stm32h750vb
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:goals: debug
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References
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**********
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.. target-notes::
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.. _Zadig:
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https://zadig.akeo.ie/
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.. _dfu-util:
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http://dfu-util.sourceforge.net/build.html
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.. _STM32H750 on www.st.com:
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https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html
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.. _STM32H750xx reference manual:
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https://www.st.com/resource/en/reference_manual/rm0433-stm32h742-stm32h743753-and-stm32h750-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
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.. _STM32H750xx datasheet:
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https://www.st.com/resource/en/datasheet/stm32h750vb.pdf

‎boards/vcc-gnd/yd_stm32h750vb/support/openocd.cfg

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source [find interface/stlink-dap.cfg]
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transport select dapdirect_swd
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set WORKAREASIZE 0x2000
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set CHIPNAME STM23H750VB
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set BOARDNAME YD_STM23H750VB
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source [find target/stm32h7x.cfg]
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# Use connect_assert_srst here to be able to program
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# even when core is in sleep mode
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reset_config srst_only srst_nogate connect_assert_srst
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$_CHIPNAME.cpu0 configure -event gdb-attach {
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echo "Debugger attaching: halting execution"
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gdb_breakpoint_override hard
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}
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$_CHIPNAME.cpu0 configure -event gdb-detach {
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echo "Debugger detaching: resuming execution"
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resume
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}
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# Due to the use of connect_assert_srst, running gdb requires
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# to reset halt just after openocd init.
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rename init old_init
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proc init {} {
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old_init
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reset halt
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}

‎boards/vcc-gnd/yd_stm32h750vb/yd_stm32h750vb.dts

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/*
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* Copyright(c) 2024 John Sanpe <sanpeqf@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/h7/stm32h750Xb.dtsi>
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#include <st/h7/stm32h750vbtx-pinctrl.dtsi>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "VCC-GND Studio STM32H750VB";
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compatible = "st,stm32h750vb";
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aliases {
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led0 = &yellow_led;
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led1 = &blue_led;
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sw0 = &user_button;
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spi-flash0 = &w25q128jv;
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};
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,flash-controller = &w25q128jv;
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};
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leds {
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compatible = "gpio-leds";
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red_led: led_1 {
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gpios = <&gpioa 13 GPIO_ACTIVE_HIGH>;
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label = "LED1";
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status = "disabled";
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};
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green_led: led_2 {
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gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>;
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label = "LED2";
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status = "disabled";
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};
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yellow_led: led_3 {
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gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
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label = "LED3";
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};
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blue_led: led_4 {
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gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
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label = "LED4";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button {
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gpios = <&gpiob 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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zephyr,code = <INPUT_KEY_0>;
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label = "USR";
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};
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};
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(25)>;
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status = "okay";
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};
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&clk_lse {
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status = "okay";
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};
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&pll {
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div-m = <5>;
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mul-n = <192>;
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div-p = <2>;
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div-q = <4>;
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div-r = <4>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(480)>;
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d1cpre = <1>;
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hpre = <2>;
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d1ppre = <2>;
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d2ppre1 = <2>;
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d2ppre2 = <2>;
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d3ppre = <2>;
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};
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&usart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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current-speed = <115200>;
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status = "okay";
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};
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&sdmmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
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&sdmmc1_d2_pc10 &sdmmc1_d3_pc11
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&sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
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cd-gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&quadspi {
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pinctrl-names = "default";
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pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb10
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&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
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&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
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status = "okay";
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w25q128jv: qspi-nor-flash@90000000 {
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compatible = "st,stm32-qspi-nor";
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reg = <0x90000000 DT_SIZE_M(16)>;
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qspi-max-frequency = <80000000>;
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spi-bus-width = <4>;
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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storage_partition: partition@0 {
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label = "storage";
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reg = <0x0 DT_SIZE_M(16)>;
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};
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};
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};
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};

‎boards/vcc-gnd/yd_stm32h750vb/yd_stm32h750vb.yaml

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identifier: yd_stm32h750vb
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name: YD-STM32H750VB
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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- xtools
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ram: 1024
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flash: 128
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supported:
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- gpio
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- uart
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- qspi
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vendor: vcc-gnd

‎boards/vcc-gnd/yd_stm32h750vb/yd_stm32h750vb_defconfig

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# Copyright(c) 2024 John Sanpe <sanpeqf@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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# Enable the internal SMPS regulator
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CONFIG_POWER_SUPPLY_LDO=y
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable HW stack protection
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CONFIG_HW_STACK_PROTECTION=y
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CONFIG_SERIAL=y
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# console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# enable GPIO
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CONFIG_GPIO=y
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# Enable Clocks
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CONFIG_CLOCK_CONTROL=y
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# enable pin controller
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CONFIG_PINCTRL=y

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