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| 1 | +/* |
| 2 | + * Copyright (c) 2024 Realtek Semiconductor, Inc. |
| 3 | + * SPDX-License-Identifier: Apache-2.0 |
| 4 | + */ |
| 5 | + |
| 6 | +#include <arm/armv8-m.dtsi> |
| 7 | +#include <mem.h> |
| 8 | +#include <freq.h> |
| 9 | +#include <zephyr/dt-bindings/interrupt-controller/rts5817_intc.h> |
| 10 | +#include <zephyr/dt-bindings/pinctrl/rts5817_pinctrl.h> |
| 11 | +#include <zephyr/dt-bindings/reset/rts5817_reset.h> |
| 12 | +#include <zephyr/dt-bindings/clock/rts5817_clock.h> |
| 13 | + |
| 14 | +/ { |
| 15 | + chosen { |
| 16 | + zephyr,sram = &sram0; |
| 17 | + }; |
| 18 | + |
| 19 | + cpus { |
| 20 | + #address-cells = <1>; |
| 21 | + #size-cells = <0>; |
| 22 | + |
| 23 | + cpu@0 { |
| 24 | + device_type = "cpu"; |
| 25 | + compatible = "arm,cortex-m33"; |
| 26 | + reg = <0>; |
| 27 | + clock-frequency = <DT_FREQ_M(120)>; |
| 28 | + #address-cells = <1>; |
| 29 | + #size-cells = <1>; |
| 30 | + cpu-power-states = <&standby &suspend &sleep>; |
| 31 | + }; |
| 32 | + |
| 33 | + power-states { |
| 34 | + standby: standby { |
| 35 | + compatible = "zephyr,power-state"; |
| 36 | + power-state-name = "suspend-to-idle"; |
| 37 | + min-residency-us = <1000>; |
| 38 | + exit-latency-us = <10>; |
| 39 | + }; |
| 40 | + |
| 41 | + suspend: suspend { |
| 42 | + compatible = "zephyr,power-state"; |
| 43 | + power-state-name = "suspend-to-ram"; |
| 44 | + substate-id = <0>; |
| 45 | + min-residency-us = <2000>; |
| 46 | + exit-latency-us = <20>; |
| 47 | + }; |
| 48 | + |
| 49 | + sleep: sleep { |
| 50 | + compatible = "zephyr,power-state"; |
| 51 | + power-state-name = "suspend-to-ram"; |
| 52 | + substate-id = <1>; |
| 53 | + min-residency-us = <3000>; |
| 54 | + exit-latency-us = <30>; |
| 55 | + }; |
| 56 | + }; |
| 57 | + }; |
| 58 | + |
| 59 | + sram0: memory@20000000 { |
| 60 | + compatible = "mmio-sram"; |
| 61 | + reg = <0x20000000 DT_SIZE_K(256)>; |
| 62 | + }; |
| 63 | + |
| 64 | + soc { |
| 65 | + #address-cells = <1>; |
| 66 | + #size-cells = <1>; |
| 67 | + compatible = "simple-bus"; |
| 68 | + }; |
| 69 | +}; |
| 70 | + |
| 71 | +&nvic { |
| 72 | + arm,num-irq-priority-bits = <3>; |
| 73 | +}; |
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