boards: frdm_mcxa166, frdm_mcxa276: add adc support

peterwangsz · kartben · commit 073e04ce3204 · 2025-05-16T19:01:50.000+02:00
1. enable adc support
2. verified samples/drivers/adc/adc_dt and tests/drivers/adc/adc_api

Signed-off-by: Peter Wang &lt;chaoyi.wang@nxp.com&gt;
diff --git a/boards/nxp/frdm_mcxa166/board.c b/boards/nxp/frdm_mcxa166/board.c
@@ -188,6 +188,20 @@ void board_early_init_hook(void)
 	CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1u);
 #endif
 
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc1))
+	CLOCK_SetClockDiv(kCLOCK_DivADC, 1u);
+	CLOCK_AttachClk(kFRO_LF_DIV_to_ADC);
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc0))
+	CLOCK_EnableClock(kCLOCK_GateADC0);
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc1))
+	CLOCK_EnableClock(kCLOCK_GateADC1);
+#endif
+
+#endif
+
 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lptmr0))
 
 /*
diff --git a/boards/nxp/frdm_mcxa166/frdm_mcxa166-pinctrl.dtsi b/boards/nxp/frdm_mcxa166/frdm_mcxa166-pinctrl.dtsi
@@ -26,4 +26,12 @@
 			input-enable;
 		};
 	};
+
+	pinmux_lpadc0: pinmux_lpadc0 {
+		group0 {
+			pinmux = <ADC0_A7_P2_7>;
+			slew-rate = "fast";
+			drive-strength = "low";
+		};
+	};
 };
diff --git a/boards/nxp/frdm_mcxa166/frdm_mcxa166.dts b/boards/nxp/frdm_mcxa166/frdm_mcxa166.dts
@@ -120,6 +120,12 @@
 	status = "okay";
 };
 
+&lpadc0 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_lpadc0>;
+	pinctrl-names = "default";
+};
+
 &flash {
 	partitions {
 		compatible = "fixed-partitions";
diff --git a/boards/nxp/frdm_mcxa166/frdm_mcxa166.yaml b/boards/nxp/frdm_mcxa166/frdm_mcxa166.yaml
@@ -17,6 +17,7 @@ supported:
   - gpio
   - uart
   - flash
+  - adc
   - watchdog
   - counter
   - dma
diff --git a/boards/nxp/frdm_mcxa166/frdm_mcxa166_defconfig b/boards/nxp/frdm_mcxa166/frdm_mcxa166_defconfig
@@ -9,4 +9,5 @@ CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_GPIO=y
+CONFIG_LPADC_DO_OFFSET_CALIBRATION=y
 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
diff --git a/boards/nxp/frdm_mcxa276/board.c b/boards/nxp/frdm_mcxa276/board.c
@@ -188,6 +188,20 @@ void board_early_init_hook(void)
 	CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1u);
 #endif
 
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc1))
+	CLOCK_SetClockDiv(kCLOCK_DivADC, 1u);
+	CLOCK_AttachClk(kFRO_LF_DIV_to_ADC);
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc0))
+	CLOCK_EnableClock(kCLOCK_GateADC0);
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc1))
+	CLOCK_EnableClock(kCLOCK_GateADC1);
+#endif
+
+#endif
+
 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lptmr0))
 
 /*
diff --git a/boards/nxp/frdm_mcxa276/frdm_mcxa276-pinctrl.dtsi b/boards/nxp/frdm_mcxa276/frdm_mcxa276-pinctrl.dtsi
@@ -26,4 +26,12 @@
 			input-enable;
 		};
 	};
+
+	pinmux_lpadc0: pinmux_lpadc0 {
+		group0 {
+			pinmux = <ADC0_A7_P2_7>;
+			slew-rate = "fast";
+			drive-strength = "low";
+		};
+	};
 };
diff --git a/boards/nxp/frdm_mcxa276/frdm_mcxa276.dts b/boards/nxp/frdm_mcxa276/frdm_mcxa276.dts
@@ -120,6 +120,12 @@
 	status = "okay";
 };
 
+&lpadc0 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_lpadc0>;
+	pinctrl-names = "default";
+};
+
 &flash {
 	partitions {
 		compatible = "fixed-partitions";
diff --git a/boards/nxp/frdm_mcxa276/frdm_mcxa276.yaml b/boards/nxp/frdm_mcxa276/frdm_mcxa276.yaml
@@ -17,6 +17,7 @@ supported:
   - gpio
   - uart
   - flash
+  - adc
   - watchdog
   - counter
   - dma
diff --git a/boards/nxp/frdm_mcxa276/frdm_mcxa276_defconfig b/boards/nxp/frdm_mcxa276/frdm_mcxa276_defconfig
@@ -9,4 +9,5 @@ CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_GPIO=y
+CONFIG_LPADC_DO_OFFSET_CALIBRATION=y
 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
diff --git a/dts/arm/nxp/nxp_mcxa166.dtsi b/dts/arm/nxp/nxp_mcxa166.dtsi
@@ -286,6 +286,38 @@
 			status = "disabled";
 		};
 
+		lpadc0: lpadc@400af000 {
+			compatible = "nxp,lpc-lpadc";
+			reg = <0x400af000 0x1000>;
+			interrupts = <62 0>;
+			status = "disabled";
+			clk-divider = <1>;
+			clk-source = <0>;
+			voltage-ref= <2>;
+			calibration-average = <128>;
+			power-level = <0>;
+			offset-value-a = <0>;
+			offset-value-b = <0>;
+			#io-channel-cells = <1>;
+			clocks = <&syscon MCUX_LPADC1_CLK>;
+		};
+
+		lpadc1: lpadc@400b0000 {
+			compatible = "nxp,lpc-lpadc";
+			reg = <0x400b0000 0x1000>;
+			interrupts = <63 0>;
+			status = "disabled";
+			clk-divider = <1>;
+			clk-source = <0>;
+			voltage-ref= <2>;
+			calibration-average = <128>;
+			power-level = <1>;
+			offset-value-a = <0>;
+			offset-value-b = <0>;
+			#io-channel-cells = <1>;
+			clocks = <&syscon MCUX_LPADC2_CLK>;
+		};
+
 		wwdt0: watchdog@4000c000 {
 			compatible = "nxp,lpc-wwdt";
 			reg = <0x4000c000 0x1000>;
diff --git a/dts/arm/nxp/nxp_mcxa276.dtsi b/dts/arm/nxp/nxp_mcxa276.dtsi
@@ -286,6 +286,38 @@
 			status = "disabled";
 		};
 
+		lpadc0: lpadc@400af000 {
+			compatible = "nxp,lpc-lpadc";
+			reg = <0x400af000 0x1000>;
+			interrupts = <62 0>;
+			status = "disabled";
+			clk-divider = <1>;
+			clk-source = <0>;
+			voltage-ref= <2>;
+			calibration-average = <128>;
+			power-level = <0>;
+			offset-value-a = <0>;
+			offset-value-b = <0>;
+			#io-channel-cells = <1>;
+			clocks = <&syscon MCUX_LPADC1_CLK>;
+		};
+
+		lpadc1: lpadc@400b0000 {
+			compatible = "nxp,lpc-lpadc";
+			reg = <0x400b0000 0x1000>;
+			interrupts = <63 0>;
+			status = "disabled";
+			clk-divider = <1>;
+			clk-source = <0>;
+			voltage-ref= <2>;
+			calibration-average = <128>;
+			power-level = <1>;
+			offset-value-a = <0>;
+			offset-value-b = <0>;
+			#io-channel-cells = <1>;
+			clocks = <&syscon MCUX_LPADC2_CLK>;
+		};
+
 		wwdt0: watchdog@4000c000 {
 			compatible = "nxp,lpc-wwdt";
 			reg = <0x4000c000 0x1000>;
diff --git a/samples/drivers/adc/adc_dt/boards/frdm_mcxa166.conf b/samples/drivers/adc/adc_dt/boards/frdm_mcxa166.conf
@@ -0,0 +1 @@
+CONFIG_LPADC_DO_OFFSET_CALIBRATION=y
diff --git a/samples/drivers/adc/adc_dt/boards/frdm_mcxa166.overlay b/samples/drivers/adc/adc_dt/boards/frdm_mcxa166.overlay
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2025 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		/* adjust channel number according to pinmux in board.dts */
+		io-channels = <&lpadc0 0>;
+	};
+};
+
+&lpadc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * To use this sample:
+	 * LPADC0 CH7 is used
+	 * - Connect LPADC0 CH7 signal to voltage between 0~3.3V (J4 pin6)
+	 */
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <16>;
+		zephyr,input-positive = <MCUX_LPADC_CH7A>;
+	};
+};
diff --git a/samples/drivers/adc/adc_dt/boards/frdm_mcxa276.conf b/samples/drivers/adc/adc_dt/boards/frdm_mcxa276.conf
@@ -0,0 +1 @@
+CONFIG_LPADC_DO_OFFSET_CALIBRATION=y
diff --git a/samples/drivers/adc/adc_dt/boards/frdm_mcxa276.overlay b/samples/drivers/adc/adc_dt/boards/frdm_mcxa276.overlay
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2025 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		/* adjust channel number according to pinmux in board.dts */
+		io-channels = <&lpadc0 0>;
+	};
+};
+
+&lpadc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * To use this sample:
+	 * LPADC0 CH7 is used
+	 * - Connect LPADC0 CH7 signal to voltage between 0~3.3V (J4 pin6)
+	 */
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <16>;
+		zephyr,input-positive = <MCUX_LPADC_CH7A>;
+	};
+};
diff --git a/samples/drivers/adc/adc_dt/sample.yaml b/samples/drivers/adc/adc_dt/sample.yaml
@@ -39,6 +39,8 @@ tests:
       - xg24_rb4187c
       - xg29_rb4412a
       - raytac_an54l15q_db/nrf54l15/cpuapp
+      - frdm_mcxa166
+      - frdm_mcxa276
     integration_platforms:
       - nucleo_l073rz
       - nrf52840dk/nrf52840
diff --git a/tests/drivers/adc/adc_api/boards/frdm_mcxa166.conf b/tests/drivers/adc/adc_api/boards/frdm_mcxa166.conf
@@ -0,0 +1 @@
+CONFIG_LPADC_DO_OFFSET_CALIBRATION=y
diff --git a/tests/drivers/adc/adc_api/boards/frdm_mcxa166.overlay b/tests/drivers/adc/adc_api/boards/frdm_mcxa166.overlay
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2025 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		/* adjust channel number according to pinmux in board.dts */
+		io-channels = <&lpadc0 0>;
+	};
+};
+
+&lpadc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * To use this sample:
+	 * LPADC0 CH7 is used
+	 * - Connect LPADC0 CH7 signal to voltage between 0~3.3V (J4 pin6)
+	 */
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <16>;
+		zephyr,input-positive = <MCUX_LPADC_CH7A>;
+	};
+};
diff --git a/tests/drivers/adc/adc_api/boards/frdm_mcxa276.conf b/tests/drivers/adc/adc_api/boards/frdm_mcxa276.conf
@@ -0,0 +1 @@
+CONFIG_LPADC_DO_OFFSET_CALIBRATION=y
diff --git a/tests/drivers/adc/adc_api/boards/frdm_mcxa276.overlay b/tests/drivers/adc/adc_api/boards/frdm_mcxa276.overlay
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2025 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		/* adjust channel number according to pinmux in board.dts */
+		io-channels = <&lpadc0 0>;
+	};
+};
+
+&lpadc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * To use this sample:
+	 * LPADC0 CH7 is used
+	 * - Connect LPADC0 CH7 signal to voltage between 0~3.3V (J4 pin6)
+	 */
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <16>;
+		zephyr,input-positive = <MCUX_LPADC_CH7A>;
+	};
+};

-Original file line number
+Diff line change
   - gpio
   - uart
   - flash
 +  - adc
   - watchdog
   - counter
   - dma