@@ -12,6 +12,8 @@ LOG_MODULE_REGISTER(dma_cc23x0, CONFIG_DMA_LOG_LEVEL);
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#include <zephyr/device.h>
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#include <zephyr/drivers/dma.h>
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#include <zephyr/irq.h>
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+ #include <zephyr/pm/device.h>
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+ #include <zephyr/pm/policy.h>
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#include <zephyr/sys/util.h>
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#include <driverlib/clkctl.h>
@@ -56,6 +58,20 @@ struct dma_cc23x0_data {
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struct dma_cc23x0_channel channels [UDMA_NUM_CHANNELS ];
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};
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+ #ifdef CONFIG_PM_DEVICE
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+ static inline void dma_cc23x0_pm_policy_state_lock_get (void )
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+ {
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+ pm_policy_state_lock_get (PM_STATE_RUNTIME_IDLE , PM_ALL_SUBSTATES );
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+ pm_policy_state_lock_get (PM_STATE_STANDBY , PM_ALL_SUBSTATES );
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+ }
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+
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+ static inline void dma_cc23x0_pm_policy_state_lock_put (void )
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+ {
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+ pm_policy_state_lock_put (PM_STATE_STANDBY , PM_ALL_SUBSTATES );
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+ pm_policy_state_lock_put (PM_STATE_RUNTIME_IDLE , PM_ALL_SUBSTATES );
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+ }
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+ #endif /* CONFIG_PM_DEVICE */
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+
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/*
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* If the channel is a software channel, then the completion will be signaled
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* on this DMA dedicated interrupt.
@@ -343,27 +359,51 @@ static int dma_cc23x0_get_status(const struct device *dev, uint32_t channel,
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return 0 ;
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}
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- static int dma_cc23x0_init (const struct device * dev )
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+ static int dma_cc23x0_enable (struct dma_cc23x0_data * data )
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+ {
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+ CLKCTLEnable (CLKCTL_BASE , CLKCTL_DMA );
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+
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+ uDMAEnable ();
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+
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+ /* Set base address for channel control table (descriptors) */
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+ uDMASetControlBase (data -> desc );
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+
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+ return 0 ;
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+ }
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+
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+ #ifdef CONFIG_PM_DEVICE
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+
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+ static int dma_cc23x0_pm_action (const struct device * dev , enum pm_device_action action )
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{
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struct dma_cc23x0_data * data = dev -> data ;
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+ switch (action ) {
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+ case PM_DEVICE_ACTION_SUSPEND :
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+ uDMADisable ();
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+ CLKCTLDisable (CLKCTL_BASE , CLKCTL_DMA );
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+ dma_cc23x0_pm_policy_state_lock_put ();
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+ return 0 ;
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+ case PM_DEVICE_ACTION_RESUME :
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+ dma_cc23x0_pm_policy_state_lock_get ();
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+ dma_cc23x0_enable (data );
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+ return 0 ;
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+ default :
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+ return - ENOTSUP ;
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+ }
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+ }
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+
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+ #endif /* CONFIG_PM_DEVICE */
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+
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+ static int dma_cc23x0_init (const struct device * dev )
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+ {
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IRQ_CONNECT (DT_INST_IRQN (0 ),
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DT_INST_IRQ (0 , priority ),
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dma_cc23x0_isr ,
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DEVICE_DT_INST_GET (0 ),
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0 );
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irq_enable (DT_INST_IRQN (0 ));
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- /* Enable clock */
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- CLKCTLEnable (CLKCTL_BASE , CLKCTL_DMA );
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-
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- /* Enable DMA */
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- uDMAEnable ();
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-
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- /* Set base address for channel control table (descriptors) */
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- uDMASetControlBase (data -> desc );
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-
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- return 0 ;
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+ return pm_device_driver_init (dev , dma_cc23x0_pm_action );
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}
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static struct dma_cc23x0_data cc23x0_data ;
@@ -376,7 +416,10 @@ static DEVICE_API(dma, dma_cc23x0_api) = {
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.get_status = dma_cc23x0_get_status ,
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};
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- DEVICE_DT_INST_DEFINE (0 , dma_cc23x0_init , NULL ,
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+ PM_DEVICE_DT_INST_DEFINE (0 , dma_cc23x0_pm_action );
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+
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+ DEVICE_DT_INST_DEFINE (0 , dma_cc23x0_init ,
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+ PM_DEVICE_DT_INST_GET (0 ),
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& cc23x0_data , NULL ,
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PRE_KERNEL_1 , CONFIG_DMA_INIT_PRIORITY ,
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& dma_cc23x0_api );
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