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sylvioalvesmmahadevan108
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soc: esp32s2: add cache mode disabled option
Update data cache mode to work when data cache is set to 0KB. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
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soc/espressif/esp32s2/soc_cache.c

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,9 @@
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/*
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* Data Cache definitions
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*/
27-
#if defined(CONFIG_ESP32S2_DATA_CACHE_8KB)
27+
#if defined(CONFIG_ESP32S2_DATA_CACHE_0KB)
28+
#define ESP32S2_DCACHE_SIZE CACHE_SIZE_0KB
29+
#elif defined(CONFIG_ESP32S2_DATA_CACHE_8KB)
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#define ESP32S2_DCACHE_SIZE CACHE_SIZE_8KB
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#else
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#define ESP32S2_DCACHE_SIZE CACHE_SIZE_16KB
@@ -66,15 +68,21 @@ void IRAM_ATTR esp_config_data_cache_mode(void)
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cache_line_size_t cache_line_size;
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#if CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB
69-
#if CONFIG_ESP32S2_DATA_CACHE_8KB
71+
#if CONFIG_ESP32S2_DATA_CACHE_0KB
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Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_INVALID, CACHE_MEMORY_INVALID,
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CACHE_MEMORY_INVALID);
74+
#elif CONFIG_ESP32S2_DATA_CACHE_8KB
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esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_DCACHE_LOW,
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CACHE_MEMORY_INVALID, CACHE_MEMORY_INVALID);
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#else
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esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_DCACHE_LOW,
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CACHE_MEMORY_DCACHE_HIGH, CACHE_MEMORY_INVALID);
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#endif
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#else
77-
#if CONFIG_ESP32S2_DATA_CACHE_8KB
82+
#if CONFIG_ESP32S2_DATA_CACHE_0KB
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Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH, CACHE_MEMORY_INVALID,
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CACHE_MEMORY_INVALID);
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#elif CONFIG_ESP32S2_DATA_CACHE_8KB
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esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH,
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CACHE_MEMORY_DCACHE_LOW, CACHE_MEMORY_INVALID);
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#else

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