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24 | 24 | /*
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25 | 25 | * Data Cache definitions
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26 | 26 | */
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27 |
| -#if defined(CONFIG_ESP32S2_DATA_CACHE_8KB) |
| 27 | +#if defined(CONFIG_ESP32S2_DATA_CACHE_0KB) |
| 28 | +#define ESP32S2_DCACHE_SIZE CACHE_SIZE_0KB |
| 29 | +#elif defined(CONFIG_ESP32S2_DATA_CACHE_8KB) |
28 | 30 | #define ESP32S2_DCACHE_SIZE CACHE_SIZE_8KB
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29 | 31 | #else
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30 | 32 | #define ESP32S2_DCACHE_SIZE CACHE_SIZE_16KB
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@@ -66,15 +68,21 @@ void IRAM_ATTR esp_config_data_cache_mode(void)
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66 | 68 | cache_line_size_t cache_line_size;
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67 | 69 |
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68 | 70 | #if CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB
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69 |
| -#if CONFIG_ESP32S2_DATA_CACHE_8KB |
| 71 | +#if CONFIG_ESP32S2_DATA_CACHE_0KB |
| 72 | + Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_INVALID, CACHE_MEMORY_INVALID, |
| 73 | + CACHE_MEMORY_INVALID); |
| 74 | +#elif CONFIG_ESP32S2_DATA_CACHE_8KB |
70 | 75 | esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_DCACHE_LOW,
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71 | 76 | CACHE_MEMORY_INVALID, CACHE_MEMORY_INVALID);
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72 | 77 | #else
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73 | 78 | esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_DCACHE_LOW,
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74 | 79 | CACHE_MEMORY_DCACHE_HIGH, CACHE_MEMORY_INVALID);
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75 | 80 | #endif
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76 | 81 | #else
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77 |
| -#if CONFIG_ESP32S2_DATA_CACHE_8KB |
| 82 | +#if CONFIG_ESP32S2_DATA_CACHE_0KB |
| 83 | + Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH, CACHE_MEMORY_INVALID, |
| 84 | + CACHE_MEMORY_INVALID); |
| 85 | +#elif CONFIG_ESP32S2_DATA_CACHE_8KB |
78 | 86 | esp_rom_Cache_Allocate_SRAM(CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH,
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79 | 87 | CACHE_MEMORY_DCACHE_LOW, CACHE_MEMORY_INVALID);
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80 | 88 | #else
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