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scripts: llvm: Add RV32I multi-lib alternate mappings
This commit adds the alternate RV32I multi-lib mappings, based on the list of the GCC RV32I multi-lib mappings (gcc/config/riscv/t-zephyr). Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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‎scripts/llvm/cmake/multilib.yaml.in

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#
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# Copyright (c) 2023, Arm Limited and affiliates.
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# Copyright (c) 2024 Stephanos Ioannidis <root@stephanos.io>
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
@@ -171,3 +173,49 @@ Mappings:
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- Match: -march=thumbv8\.[1-9]m\.main(\+[^\+]+)*\+lob(\+[^\+]+)*
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Flags:
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- -march=thumbv8.1m.main+lob
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# RV32I alternate mappings
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## march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32ia_zicsr_zifencei/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_zicsr2p0_zifencei2p0
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## march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32iac_zicsr_zifencei/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_zicsr2p0_zifencei2p0
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## march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32iafc_zicsr_zifencei/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_f([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_zicsr2p0_zifencei2p0
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## march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32ic_zicsr_zifencei/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_zicsr2p0_zifencei2p0
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## march.rv32im_zicsr_zifencei/mabi.ilp32=march.rv32ima_zicsr_zifencei/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_m([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)_zmmul([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_m2p0_zicsr2p0_zifencei2p0_zmmul1p0
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## march.rv32im_zicsr_zifencei/mabi.ilp32=march.rv32imc_zicsr_zifencei/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_m([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)_zmmul([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_m2p0_zicsr2p0_zifencei2p0_zmmul1p0
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## march.rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32=march.rv32ima_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_m([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)_zmmul([0-9]+p[0-9]+)_zba([0-9]+p[0-9]+)_zbb([0-9]+p[0-9]+)_zbc([0-9]+p[0-9]+)_zbs([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_m2p0_zicsr2p0_zifencei2p0_zmmul1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0
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## march.rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32=march.rv32imac_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_m([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)_zmmul([0-9]+p[0-9]+)_zba([0-9]+p[0-9]+)_zbb([0-9]+p[0-9]+)_zbc([0-9]+p[0-9]+)_zbs([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_m2p0_zicsr2p0_zifencei2p0_zmmul1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0
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## march.rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32=march.rv32imc_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32
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- Match: -march=rv32i([0-9]+p[0-9]+)_m([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)_zmmul([0-9]+p[0-9]+)_zba([0-9]+p[0-9]+)_zbb([0-9]+p[0-9]+)_zbc([0-9]+p[0-9]+)_zbs([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_m2p0_zicsr2p0_zifencei2p0_zmmul1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0
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## march.rv32imafd_zicsr_zifencei/mabi.ilp32d=march.rv32imafdc_zicsr_zifencei/mabi.ilp32d
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- Match: -march=rv32i([0-9]+p[0-9]+)_m([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_f([0-9]+p[0-9]+)_d([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)_zmmul([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0_zmmul1p0
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## march.rv32if_zicsr_zifencei/mabi.ilp32f=march.rv32iafc_zicsr_zifencei/mabi.ilp32f
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- Match: -march=rv32i([0-9]+p[0-9]+)_a([0-9]+p[0-9]+)_f([0-9]+p[0-9]+)_c([0-9]+p[0-9]+)_zicsr([0-9]+p[0-9]+)_zifencei([0-9]+p[0-9]+)
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Flags:
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- -march=rv32i2p1_f2p2_zicsr2p0_zifencei2p0

‎scripts/llvm/test/multilib/rv32i.test

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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32i_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32I_ZICSR_ZIFENCEI_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32ia_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32I_ZICSR_ZIFENCEI_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32iac_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32I_ZICSR_ZIFENCEI_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32iafc_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32I_ZICSR_ZIFENCEI_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32ic_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32I_ZICSR_ZIFENCEI_ILP32
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# RV32I_ZICSR_ZIFENCEI_ILP32: riscv32-none-elf/rv32i_zicsr_zifencei_ilp32_exn_rtti{{$}}
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# RV32I_ZICSR_ZIFENCEI_ILP32-EMPTY:
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32im_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32ima_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imc_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ILP32
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# RV32IM_ZICSR_ZIFENCEI_ILP32: riscv32-none-elf/rv32im_zicsr_zifencei_ilp32_exn_rtti{{$}}
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# RV32IM_ZICSR_ZIFENCEI_ILP32-EMPTY:
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32im_zicsr_zifencei_zba_zbb_zbc_zbs -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32ima_zicsr_zifencei_zba_zbb_zbc_zbs -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imac_zicsr_zifencei_zba_zbb_zbc_zbs -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imc_zicsr_zifencei_zba_zbb_zbc_zbs -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32
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# RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32: riscv32-none-elf/rv32im_zicsr_zifencei_zba_zbb_zbc_zbs_ilp32_exn_rtti{{$}}
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# RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32-EMPTY:
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# RV32IMFC_ZICSR_ZIFENCEI_ILP32F-EMPTY:
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imafd_zicsr_zifencei -mabi=ilp32d | FileCheck %s --check-prefix=RV32IMAFD_ZICSR_ZIFENCEI_ILP32D
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imafdc_zicsr_zifencei -mabi=ilp32d | FileCheck %s --check-prefix=RV32IMAFD_ZICSR_ZIFENCEI_ILP32D
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32g -mabi=ilp32d | FileCheck %s --check-prefix=RV32IMAFD_ZICSR_ZIFENCEI_ILP32D
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32gc -mabi=ilp32d | FileCheck %s --check-prefix=RV32IMAFD_ZICSR_ZIFENCEI_ILP32D
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# RV32IMAFD_ZICSR_ZIFENCEI_ILP32D: riscv32-none-elf/rv32imafd_zicsr_zifencei_ilp32d_exn_rtti{{$}}
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# RV32IMAFD_ZICSR_ZIFENCEI_ILP32D-EMPTY:
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32if_zicsr_zifencei -mabi=ilp32f | FileCheck %s --check-prefix=RV32IF_ZICSR_ZIFENCEI_ILP32F
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# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32iafc_zicsr_zifencei -mabi=ilp32f | FileCheck %s --check-prefix=RV32IF_ZICSR_ZIFENCEI_ILP32F
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# RV32IF_ZICSR_ZIFENCEI_ILP32F: riscv32-none-elf/rv32if_zicsr_zifencei_ilp32f_exn_rtti{{$}}
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# RV32IF_ZICSR_ZIFENCEI_ILP32F-EMPTY:

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