@@ -3348,10 +3348,22 @@ arc64_address_cost (rtx addr, machine_mode mode,
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/* The cheapest construct are the addresses which fit a store
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instruction (or a fp load/store instruction). */
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if (arc64_legitimate_address_1_p (mode , addr , true, false, true))
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- return 0 ;
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+ switch (GET_CODE (addr ))
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+ {
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+ case PRE_DEC :
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+ case PRE_INC :
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+ case POST_DEC :
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+ case POST_INC :
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+ case PRE_MODIFY :
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+ case POST_MODIFY :
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+ return 0 ;
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+
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+ default :
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+ return 1 ;
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+ }
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/* Anything else has a limm. */
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- return cost_limm + 1 ;
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+ return cost_limm + 2 ;
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}
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/* Compute the rtx cost. */
@@ -3376,7 +3388,7 @@ arc64_rtx_costs (rtx x, machine_mode mode, rtx_code outer,
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{
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case MEM :
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/* Store instruction. */
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- * cost += arc64_address_cost (XEXP (op0 , 0 ), mode , 0 , speed );
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+ * cost += arc64_address_cost (XEXP (op0 , 0 ), mode , 0 , speed )) ;
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if (CONST_INT_P (op1 ))
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{
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* cost += speed ? 0 :
@@ -3464,6 +3476,7 @@ arc64_rtx_costs (rtx x, machine_mode mode, rtx_code outer,
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* cost = rtx_cost (op0 , VOIDmode , SIGN_EXTEND , 0 , speed );
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return true;
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}
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+ * cost += COSTS_N_INSNS (2 );
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break ;
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case CONST_INT :
@@ -3495,11 +3508,17 @@ arc64_rtx_costs (rtx x, machine_mode mode, rtx_code outer,
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case ASHIFT :
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case ASHIFTRT :
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case LSHIFTRT :
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+ return true;
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+
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case MULT :
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+ /* Multiplication has large latencys, try if we can use adds and
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+ shifts. */
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+ * cost = COSTS_N_INSNS (2 );
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return true;
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case DIV :
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case UDIV :
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+ /* Fav synthetic divs. */
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* cost = COSTS_N_INSNS (12 );
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return true;
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