0.3.8

• fix(rp2040): SUBS register N flag handling (#26) 9162c5e

v0.3.7...v0.3.8

0.3.7

• feat(rtc): toy rtc implementation 8da8a42
• fix(rp2040): bug in lsrs carry calculation c3965fb
• fix(rp2040): bug in lsrs when shift >= 32 #24 e5b93a3
• fix(rp2040): carry flag in CMP register aad24cb
• fix(rp2040): cmp carry issue 7c31662
• fix(rp2040): adcs adding 0+0 with carry shouldn't set overflow 2342ce2
• fix(rp2040): don't update flags in ADD reg (encoding T2) ac893f9
• fix(rp2040): User generated interrupts (IRQ >= 26) keep firing forever #22 c2e2915
• fix(rp2040): POP and ExceptionReturn don't play nicely together #21 923441c
• fix(rp2040): SP / R13 lowest bits should always be zero #17 8c8603c
• fix(gdbserver): support 8-bit register writes ca1519a
• fix(gdbclient): accept S response in singleStep() ec37748
• fix(gdbclient): allow writing of 8-bit registers f83f4a1
• feat(debug): implement gdbdiff 0237923
• test(instructions): zero out flags when running against silicone 54e207e
• test(instructions): fix tests that fail on silicone 50c02c4
• test(instructions): fix duplicate test name 29970d0
• test(rp2040): complete assembler tests (#23) faccc9b
• test(rp2040): add missing opcodeXXX (#18) 9198f6a
• style: reformat code with prettier 9f7b970

v0.3.6...v0.3.7

0.3.6

• test: mass refactor tests #15 06f0a88
• fix(rp2040): bug in APSR getter / setter ee6326f
• test: move instruction set tests to separate file 6409f4e
• feat(gdbclient): implement gdbserver client 5c6b268
• chore: set up eslint #10 d236355
• test(rp2040): ExceptionEntry PC LSB bit clearing issue #11 08814ae
• fix(rp2040): add modulu for the shift in ROR #14 5b3513d

v0.3.5...v0.3.6

0.3.5

• feat(rp2040): count clock cycles 8f1d1df
• feat(rp2040): add CMN, REV16, REVSH, ROR, SXTH #9 98e208a
• fix(rp2040): bug in ASRS with 0 shift #12 c310648
• fix(rp2040): misplaced comment b09edb8
• fix(rp2040): invalid carry in ADD 24cee4e
• feat(rp2040): decode NOP, WFI, YIELD #9 dcdf6cd
• feat(rp2040): decoding for DSB SY, ISB SY #9 4a715fe
• fix(rp2040): decoding of UDF.W #8 6410e0e
• style(rp2040): Clear LSB of PC before instruction fetch (#7) 4b6db6f

v0.3.4...v0.3.5

0.3.4

• feat(systick): WiP systick timer d9cd552
• feat(rp2040): reduce console.log chatter a95f3ce
• feat(rp2040): add ASRS (register) 3bd8d10
• test(rp2040): fix tests following BL/BLX fix 2a55bb1
• fix(rp2040): set LR LSB #6 a4fe5b3

v0.3.3...v0.3.4

0.3.3

• fix(rp2040): clear PC LSB in exceptionEntry() aba71ef

v0.3.2...v0.3.3

0.3.2

• fix(rp2040): stupid bug e7eb2bf
• fix(demo): missing parameter for loadHex() da1117e

v0.3.1...v0.3.2

0.3.1

• fix(rp2040): decode all variants of the DMB instruction e3a5603
• chore: git ignore ELF files ccdb192
• fix(rp2040): disallow switching stack in Handler mode e1b8ba1
• feat(gdbserver): support extra registers 3fcdf44
• feat(rp2040): implement SVC / SVCall 383177e
• fix(rp2040): bug in MULS instruction #5 5ebab17
• fix(gdbserver): make it faster using setNoDelay() ce0359b
• fix(demo): support for large hex files 25e3a6c

v0.3.0...v0.3.1

0.3.0

• chore: module entry point for webpack f64661d
• feat(nvic): interrupt implementation 0610c5b
• feat(nvic): partial interrupt implementation 20de368
• refactor: rename util → utils 240f30b

v0.2.0...v0.3.0

0.2.0

• chore: hybrid npm module (cjs+esm) 0043ff1
• feat(rp2040): MRS, MULS, REV, UXTH ad674dd
• feat(rp2040): implement CMP (register) encoding T2 6f5e911
• feat(timer): a skeleton of a timer! afb62f2
• refactor: create Peripheral interface 9d0debe

v0.1.1...v0.2.0