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[Attributor] Add initial support for vectors in AAPointerInfo
While full support requires more work (see TODOs), this allows us to handle vector writes with a single constant value properly. For now, we can handle the same constant values stored to all elements if everything is of a fixed size.
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2 files changed

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llvm/lib/Transforms/IPO/AttributorAttributes.cpp

Lines changed: 33 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1352,10 +1352,41 @@ struct AAPointerInfoFloating : public AAPointerInfoImpl {
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// Make a strictly ascending list of offsets as required by addAccess()
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llvm::sort(Offsets);
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auto Last = std::unique(Offsets.begin(), Offsets.end());
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auto *Last = std::unique(Offsets.begin(), Offsets.end());
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Offsets.erase(Last, Offsets.end());
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1358-
Changed = Changed | addAccess(A, {Offsets, Size}, I, Content, Kind, &Ty);
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VectorType *VT = dyn_cast<VectorType>(&Ty);
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if (!VT || VT->getElementCount().isScalable() ||
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!Content.value_or(nullptr) || !isa<Constant>(*Content) ||
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(*Content)->getType() != VT ||
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DL.getTypeStoreSize(VT->getElementType()).isScalable()) {
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Changed = Changed | addAccess(A, {Offsets, Size}, I, Content, Kind, &Ty);
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} else {
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// Handle vector stores with constant content element-wise.
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// TODO: We could look for the elements or create instructions
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// representing them.
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// TODO: We need to push the Content into the range abstraction
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// (AA::RangeTy) to allow different content values for different
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// ranges. ranges. Hence, support vectors storing different values.
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Type *ElementType = VT->getElementType();
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int64_t ElementSize = DL.getTypeStoreSize(ElementType).getFixedValue();
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auto *ConstContent = cast<Constant>(*Content);
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Type *Int32Ty = Type::getInt32Ty(ElementType->getContext());
1375+
SmallVector<int64_t> ElementOffsets(Offsets.begin(), Offsets.end());
1376+
1377+
for (int i = 0, e = VT->getElementCount().getFixedValue(); i != e; ++i) {
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Value *ElementContent = ConstantExpr::getExtractElement(
1379+
ConstContent, ConstantInt::get(Int32Ty, i));
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1381+
// Add the element access.
1382+
Changed = Changed | addAccess(A, {ElementOffsets, ElementSize}, I,
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ElementContent, Kind, ElementType);
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1385+
// Advance the offsets for the next element.
1386+
for (auto &ElementOffset : ElementOffsets)
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ElementOffset += ElementSize;
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}
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}
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return true;
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};
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Lines changed: 63 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,63 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
2+
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,TUNIT
3+
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,CGSCC
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;
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
6+
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define i32 @vec_write_0() {
8+
; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_0
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; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: ret i32 0
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;
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%a = alloca <2 x i32>
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store <2 x i32> <i32 0, i32 0>, ptr %a
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%l1 = load i32, ptr %a
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%g = getelementptr i32, ptr %a, i64 1
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%l2 = load i32, ptr %g
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%add = add i32 %l1, %l2
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ret i32 %add
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}
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define i32 @vec_write_1() {
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; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_1
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; CHECK-SAME: () #[[ATTR0]] {
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; CHECK-NEXT: ret i32 10
27+
;
28+
%a = alloca <2 x i32>
29+
store <2 x i32> <i32 5, i32 5>, ptr %a
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%l1B = load i32, ptr %a
31+
%g = getelementptr i32, ptr %a, i64 1
32+
%l2B = load i32, ptr %g
33+
%add = add i32 %l1B, %l2B
34+
ret i32 %add
35+
}
36+
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; TODO: We should support this.
38+
define i32 @vec_write_2() {
39+
; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn memory(none)
40+
; CHECK-LABEL: define {{[^@]+}}@vec_write_2
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; CHECK-SAME: () #[[ATTR0]] {
42+
; CHECK-NEXT: [[A:%.*]] = alloca <2 x i32>, align 8
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; CHECK-NEXT: store <2 x i32> <i32 3, i32 5>, ptr [[A]], align 8
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; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 8
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; CHECK-NEXT: [[G:%.*]] = getelementptr i32, ptr [[A]], i64 1
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; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[G]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[L1]], [[L2]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
50+
%a = alloca <2 x i32>
51+
store <2 x i32> <i32 3, i32 5>, ptr %a
52+
%l1 = load i32, ptr %a
53+
%g = getelementptr i32, ptr %a, i64 1
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%l2 = load i32, ptr %g
55+
%add = add i32 %l1, %l2
56+
ret i32 %add
57+
}
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;.
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; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn memory(none) }
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;.
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CGSCC: {{.*}}
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; TUNIT: {{.*}}

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