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lines changedSubmodule Cores-VeeR-EL2 updated 28 files
- .github/scripts/gdb_test.sh+12-16
- .github/scripts/run_regression_test.sh+1-1
- .github/scripts/test.gdb+1-4
- .github/workflows/publish-webpage.yml+8-4
- .github/workflows/test-openocd.yml+1-1
- .github/workflows/test-regression-exceptions.yml+1-1
- .github/workflows/test-regression.yml+15-2
- .github/workflows/test-riscof.yml+1-1
- .github/workflows/test-riscv-dv.yml+2-2
- .github/workflows/test-verification.yml+1-1
- README.md+11
- design/dmi/rvjtag_tap.v+6
- design/el2_mem.sv+23-3
- design/el2_veer_wrapper.sv+3-4
- design/ifu/el2_ifu_ic_mem.sv+675-750
- design/lib/ahb_to_axi4.sv+44-34
- design/lib/el2_mem_if.sv+44-4
- docs/source/img/VeeR-logo-black-rgb.png
- docs/source/img/VeeR-logo-white-rgb.png
- docs/source/intro.md+2-1
- testbench/ahb_lsu_dma_bridge.sv+342
- testbench/ahb_sif.sv-2
- testbench/asm/bitmanip.s+139
- testbench/asm/icache.ld+8
- testbench/asm/icache.s+51
- testbench/icache_macros.svh+97
- testbench/tb_top.sv+578-38
- testbench/veer_wrapper.sv+37-5
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