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‎manpages/x86-aaa.7

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This page is generated by scripts; therefore may contain visual or semantical bugs. Please report them (or better, fix them) on https://github.com/ttmo-O/x86-manpages.
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.br
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Copyleft TTMO 2020 (Turkish Unofficial Chamber of Reverse Engineers - https://ttmo.re).
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MIT licensed by TTMO 2020 (Turkish Unofficial Chamber of Reverse Engineers - https://ttmo.re).

‎manpages/x86-aad.7

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This page is generated by scripts; therefore may contain visual or semantical bugs. Please report them (or better, fix them) on https://github.com/ttmo-O/x86-manpages.
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Copyleft TTMO 2020 (Turkish Unofficial Chamber of Reverse Engineers - https://ttmo.re).
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MIT licensed by TTMO 2020 (Turkish Unofficial Chamber of Reverse Engineers - https://ttmo.re).

‎manpages/x86-aam.7

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.nh
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.TH "X86-AAM" "7" "May 2019" "TTMO" "Intel x86-64 ISA Manual"
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.SH NAME
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AAM - ASCII ADJUST AX AFTER MULTIPLY
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.TS
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allbox;
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l l l l l l
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l l l l l l .
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\fB\fCOpcode\fR \fB\fCInstruction\fR \fB\fCOp/En\fR \fB\fC64\-bit Mode\fR \fB\fCCompat/Leg Mode\fR \fB\fCDescription\fR
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D4 0A AAM ZO Invalid Valid T{
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ASCII adjust AX after multiply.
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T}
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D4 ib AAM imm8 ZO Invalid Valid T{
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Adjust AX after multiply to number base imm8.
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T}
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.TE
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.SH INSTRUCTION OPERAND ENCODING
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.TS
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allbox;
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l l l l l
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l l l l l .
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Op/En Operand 1 Operand 2 Operand 3 Operand 4
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ZO NA NA NA NA
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.TE
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.SH DESCRIPTION
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.PP
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Adjusts the result of the multiplication of two unpacked BCD values to
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create a pair of unpacked (base 10) BCD values. The AX register is the
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implied source and destination operand for this instruction. The AAM
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instruction is only useful when it follows an MUL instruction that
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multiplies (binary multiplication) two unpacked BCD values and stores a
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word result in the AX register. The AAM instruction then adjusts the
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contents of the AX register to contain the correct 2\-digit unpacked
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(base 10) BCD result.
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.PP
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The generalized version of this instruction allows adjustment of the
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contents of the AX to create two unpacked digits of any number base (see
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the “Operation” section below). Here, the imm8).
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.PP
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This instruction executes as described in compatibility mode and legacy
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mode. It is not valid in 64\-bit mode.
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.SH OPERATION
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.PP
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.RS
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.nf
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IF 64\-Bit Mode
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THEN
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#UD;
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ELSE
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tempAL ← AL;
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AH ← tempAL / imm8 is set to 0AH for the AAM mnemonic *)
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AL ← tempAL MOD imm8;
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FI;
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The immediate value (imm8) is taken from the second byte of the instruction.
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.fi
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.RE
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.SH FLAGS AFFECTED
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.PP
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The SF, ZF, and PF flags are set according to the resulting binary value
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in the AL register. The OF, AF, and CF flags are undefined.
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.SH PROTECTED MODE EXCEPTIONS
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.TS
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allbox;
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l l
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l l .
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#DE T{
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If an immediate value of 0 is used.
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T}
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#UD If the LOCK prefix is used.
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.TE
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.SH REAL\-ADDRESS MODE EXCEPTIONS
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.PP
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Same exceptions as protected mode.
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.SH VIRTUAL\-8086 MODE EXCEPTIONS
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.PP
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Same exceptions as protected mode.
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.SH COMPATIBILITY MODE EXCEPTIONS
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.PP
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Same exceptions as protected mode.
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.SH 64\-BIT MODE EXCEPTIONS
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.TS
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allbox;
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l l
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l l .
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#UD If in 64\-bit mode.
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.TE
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.SH SEE ALSO
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.PP
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x86\-manpages(7) for a list of other x86\-64 man pages.
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.SH COLOPHON
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.PP
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This UNOFFICIAL, mechanically\-separated, non\-verified reference is
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provided for convenience, but it may be incomplete or broken in
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various obvious or non\-obvious ways. Refer to Intel® 64 and IA\-32
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Architectures Software Developer’s Manual for anything serious.
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.br
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This page is generated by scripts; therefore may contain visual or semantical bugs. Please report them (or better, fix them) on https://github.com/ttmo-O/x86-manpages.
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.br
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MIT licensed by TTMO 2020 (Turkish Unofficial Chamber of Reverse Engineers - https://ttmo.re).

‎manpages/x86-aas.7

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.nh
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.TH "X86-AAS" "7" "May 2019" "TTMO" "Intel x86-64 ISA Manual"
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.SH NAME
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AAS - ASCII ADJUST AL AFTER SUBTRACTION
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.TS
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allbox;
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l l l l l l
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l l l l l l .
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\fB\fCOpcode\fR \fB\fCInstruction\fR \fB\fCOp/En\fR \fB\fC64\-bit Mode\fR \fB\fCCompat/Leg Mode\fR \fB\fCDescription\fR
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3F AAS ZO Invalid Valid T{
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ASCII adjust AL after subtraction.
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T}
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.TE
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.SH INSTRUCTION OPERAND ENCODING
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.TS
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allbox;
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l l l l l
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l l l l l .
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Op/En Operand 1 Operand 2 Operand 3 Operand 4
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ZO NA NA NA NA
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.TE
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.SH DESCRIPTION
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.PP
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Adjusts the result of the subtraction of two unpacked BCD values to
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create a unpacked BCD result. The AL register is the implied source and
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destination operand for this instruction. The AAS instruction is only
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useful when it follows a SUB instruction that subtracts (binary
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subtraction) one unpacked BCD value from another and stores a byte
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result in the AL register. The AAA instruction then adjusts the contents
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of the AL register to contain the correct 1\-digit unpacked BCD result.
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.PP
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If the subtraction produced a decimal carry, the AH register decrements
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by 1, and the CF and AF flags are set. If no decimal carry occurred, the
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CF and AF flags are cleared, and the AH register is unchanged. In either
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case, the AL register is left with its top four bits set to 0.
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.PP
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This instruction executes as described in compatibility mode and legacy
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mode. It is not valid in 64\-bit mode.
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.SH OPERATION
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.PP
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.RS
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.nf
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IF 64\-bit mode
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THEN
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#UD;
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ELSE
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IF ((AL AND 0FH) > 9) or (AF = 1)
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THEN
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AX ← AX – 6;
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AH ← AH – 1;
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AF ← 1;
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CF ← 1;
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AL ← AL AND 0FH;
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ELSE
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CF ← 0;
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AF ← 0;
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AL ← AL AND 0FH;
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FI;
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FI;
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.fi
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.RE
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.SH FLAGS AFFECTED
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.PP
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The AF and CF flags are set to 1 if there is a decimal borrow;
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otherwise, they are cleared to 0. The OF, SF, ZF, and PF flags are
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undefined.
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.SH PROTECTED MODE EXCEPTIONS
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.TS
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allbox;
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l l
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l l .
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#UD If the LOCK prefix is used.
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.TE
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.SH REAL\-ADDRESS MODE EXCEPTIONS
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.PP
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Same exceptions as protected mode.
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.SH VIRTUAL\-8086 MODE EXCEPTIONS
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.PP
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Same exceptions as protected mode.
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.SH COMPATIBILITY MODE EXCEPTIONS
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.PP
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Same exceptions as protected mode.
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.SH 64\-BIT MODE EXCEPTIONS
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.TS
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allbox;
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l l
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l l .
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#UD If in 64\-bit mode.
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.TE
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.SH SEE ALSO
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.PP
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x86\-manpages(7) for a list of other x86\-64 man pages.
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.SH COLOPHON
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.PP
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This UNOFFICIAL, mechanically\-separated, non\-verified reference is
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provided for convenience, but it may be incomplete or broken in
112+
various obvious or non\-obvious ways. Refer to Intel® 64 and IA\-32
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Architectures Software Developer’s Manual for anything serious.
114+
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.br
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This page is generated by scripts; therefore may contain visual or semantical bugs. Please report them (or better, fix them) on https://github.com/ttmo-O/x86-manpages.
117+
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.br
119+
MIT licensed by TTMO 2020 (Turkish Unofficial Chamber of Reverse Engineers - https://ttmo.re).

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