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fix: design error
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src/main/scala/hdlbits/circuits/FsmSerial.scala

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,5 +56,5 @@ class HdlBitsFsmSerial extends RawModule {
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}
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// State update
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done := state === stop && counter === 7.U
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done := state === idle && counter === 7.U
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}

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