From 7a312ce5413e27973c2af883357b21b0f67f4e56 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 07:47:37 +0200 Subject: [PATCH 01/16] Fix DMA to SPI transfers on RP2350 DMA DREQ line numbers for "flow control" between SPI bus and DMA channels on RP2350 differ from RP2040. Tested with st7789 driver for Pico-1.14-LCD from Waveshare on Pico 2W. Without this fix func st7789.tx() blocks indefinitely while attempting to use DMA to SPI transfers. --- src/machine/machine_rp2_spi.go | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine/machine_rp2_spi.go b/src/machine/machine_rp2_spi.go index 88301c98b2..b1787488e3 100644 --- a/src/machine/machine_rp2_spi.go +++ b/src/machine/machine_rp2_spi.go @@ -297,10 +297,10 @@ func (spi *SPI) tx(tx []byte) error { var dreq uint32 if spi.Bus == rp.SPI0 { ch = &dmaChannels[spi0DMAChannel] - dreq = 16 // DREQ_SPI0_TX + dreq = DMA_DREQ_SPI0_TX } else { // SPI1 ch = &dmaChannels[spi1DMAChannel] - dreq = 18 // DREQ_SPI1_TX + dreq = DMA_DREQ_SPI1_TX } // Configure the DMA peripheral as follows: From 47c89937fb31edf4645d44ec6bd5b8f750bb819b Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 08:08:04 +0200 Subject: [PATCH 02/16] Add definitions for DMA DREQ "handshake" lines Specific for RP2350, missing in generated src/device/rp/rp2350.go --- src/machine/machine_rp2_2350.go | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/machine/machine_rp2_2350.go b/src/machine/machine_rp2_2350.go index a6a6aa2eb1..fc46231132 100644 --- a/src/machine/machine_rp2_2350.go +++ b/src/machine/machine_rp2_2350.go @@ -121,6 +121,15 @@ const ( fnNULL pinFunc = 0x1f ) +// Additional definitions that are missing in generated src/device/rp/rp2350.go +const ( + // from 2350 Datasheet: 12.6.4.1. System DREQ Table + DMA_DREQ_SPI0_TX = 24 + DMA_DREQ_SPI0_RX = 25 + DMA_DREQ_SPI1_TX = 26 + DMA_DREQ_SPI1_RX = 27 +) + // Configure configures the gpio pin as per mode. func (p Pin) Configure(config PinConfig) { if p == NoPin { From c207e51ac1fe05c3d9121f2c663bdb40c3da03b3 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 08:09:56 +0200 Subject: [PATCH 03/16] Add definitions for DMA DREQ "handshake" lines Specific for RP2040, missing in generated src/device/rp/rp2040.go --- src/machine/machine_rp2_2040.go | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/machine/machine_rp2_2040.go b/src/machine/machine_rp2_2040.go index 9cdb3a072e..90035d27fa 100644 --- a/src/machine/machine_rp2_2040.go +++ b/src/machine/machine_rp2_2040.go @@ -70,6 +70,15 @@ const ( numClocks ) +// Additional definitions that are missing in generated src/device/rp/rp2040.go +const ( + // from 2040 Datasheet: 2.5.3.1. System DREQ Table + DMA_DREQ_SPI0_TX = 16 + DMA_DREQ_SPI0_RX = 17 + DMA_DREQ_SPI1_TX = 18 + DMA_DREQ_SPI1_RX = 19 +) + func calcClockDiv(srcFreq, freq uint32) uint32 { // Div register is 24.8 int.frac divider so multiply by 2^8 (left shift by 8) return uint32((uint64(srcFreq) << 8) / uint64(freq)) From 970412cdd82f66245cd3e896f2f8f5bbdbfbd9ab Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 09:47:33 +0200 Subject: [PATCH 04/16] Complete table --- src/machine/machine_rp2_2040.go | 44 ++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 4 deletions(-) diff --git a/src/machine/machine_rp2_2040.go b/src/machine/machine_rp2_2040.go index 90035d27fa..e2454fa24e 100644 --- a/src/machine/machine_rp2_2040.go +++ b/src/machine/machine_rp2_2040.go @@ -73,10 +73,46 @@ const ( // Additional definitions that are missing in generated src/device/rp/rp2040.go const ( // from 2040 Datasheet: 2.5.3.1. System DREQ Table - DMA_DREQ_SPI0_TX = 16 - DMA_DREQ_SPI0_RX = 17 - DMA_DREQ_SPI1_TX = 18 - DMA_DREQ_SPI1_RX = 19 + DREQ_PIO0_TX0 = 0 + DREQ_PIO0_TX1 = 1 + DREQ_PIO0_TX2 = 2 + DREQ_PIO0_TX3 = 3 + DREQ_PIO0_RX0 = 4 + DREQ_PIO0_RX1 = 5 + DREQ_PIO0_RX2 = 6 + DREQ_PIO0_RX3 = 7 + DREQ_PIO1_TX0 = 8 + DREQ_PIO1_TX1 = 9 + DREQ_PIO1_TX2 = 10 + DREQ_PIO1_TX3 = 11 + DREQ_PIO1_RX0 = 12 + DREQ_PIO1_RX1 = 13 + DREQ_PIO1_RX2 = 14 + DREQ_PIO1_RX3 = 15 + DREQ_SPI0_TX = 16 + DREQ_SPI0_RX = 17 + DREQ_SPI1_TX = 18 + DREQ_SPI1_RX = 19 + DREQ_UART0_TX = 20 + DREQ_UART0_RX = 21 + DREQ_UART1_TX = 22 + DREQ_UART1_RX = 23 + DREQ_PWM_WRAP0 = 24 + DREQ_PWM_WRAP1 = 25 + DREQ_PWM_WRAP2 = 26 + DREQ_PWM_WRAP3 = 27 + DREQ_PWM_WRAP4 = 28 + DREQ_PWM_WRAP5 = 29 + DREQ_PWM_WRAP6 = 30 + DREQ_PWM_WRAP7 = 31 + DREQ_I2C0_TX = 32 + DREQ_I2C0_RX = 33 + DREQ_I2C1_TX = 34 + DREQ_I2C1_RX = 35 + DREQ_ADC = 36 + DREQ_XIP_STREAM = 37 + DREQ_XIP_SSITX = 38 + DREQ_XIP_SSIRX = 39 ) func calcClockDiv(srcFreq, freq uint32) uint32 { From 00bf8e4db08628962647e5491accbc79288da392 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 10:01:34 +0200 Subject: [PATCH 05/16] Complete table --- src/machine/machine_rp2_2350.go | 59 ++++++++++++++++++++++++++++++--- 1 file changed, 55 insertions(+), 4 deletions(-) diff --git a/src/machine/machine_rp2_2350.go b/src/machine/machine_rp2_2350.go index fc46231132..ee20b25965 100644 --- a/src/machine/machine_rp2_2350.go +++ b/src/machine/machine_rp2_2350.go @@ -124,10 +124,61 @@ const ( // Additional definitions that are missing in generated src/device/rp/rp2350.go const ( // from 2350 Datasheet: 12.6.4.1. System DREQ Table - DMA_DREQ_SPI0_TX = 24 - DMA_DREQ_SPI0_RX = 25 - DMA_DREQ_SPI1_TX = 26 - DMA_DREQ_SPI1_RX = 27 + DREQ_PIO0_TX0 = 0 + DREQ_PIO0_TX1 = 1 + DREQ_PIO0_TX2 = 2 + DREQ_PIO0_TX3 = 3 + DREQ_PIO0_RX0 = 4 + DREQ_PIO0_RX1 = 5 + DREQ_PIO0_RX2 = 6 + DREQ_PIO0_RX3 = 7 + DREQ_PIO1_TX0 = 8 + DREQ_PIO1_TX1 = 9 + DREQ_PIO1_TX2 = 10 + DREQ_PIO1_TX3 = 11 + DREQ_PIO1_RX0 = 12 + DREQ_PIO1_RX1 = 13 + DREQ_PIO1_RX2 = 14 + DREQ_PIO1_RX3 = 15 + DREQ_PIO2_TX0 = 16 + DREQ_PIO2_TX1 = 17 + DREQ_PIO2_TX2 = 18 + DREQ_PIO2_TX3 = 19 + DREQ_PIO2_RX0 = 20 + DREQ_PIO2_RX1 = 21 + DREQ_PIO2_RX2 = 22 + DREQ_PIO2_RX3 = 23 + DREQ_SPI0_TX = 24 + DREQ_SPI0_RX = 25 + DREQ_SPI1_TX = 26 + DREQ_SPI1_RX = 27 + DREQ_UART0_TX = 28 + DREQ_UART0_RX = 29 + DREQ_UART1_TX = 30 + DREQ_UART1_RX = 31 + DREQ_PWM_WRAP0 = 32 + DREQ_PWM_WRAP1 = 33 + DREQ_PWM_WRAP2 = 34 + DREQ_PWM_WRAP3 = 35 + DREQ_PWM_WRAP4 = 36 + DREQ_PWM_WRAP5 = 37 + DREQ_PWM_WRAP6 = 38 + DREQ_PWM_WRAP7 = 39 + DREQ_PWM_WRAP8 = 40 + DREQ_PWM_WRAP9 = 41 + DREQ_PWM_WRAP10 = 42 + DREQ_PWM_WRAP11 = 43 + DREQ_I2C0_TX = 44 + DREQ_I2C0_RX = 45 + DREQ_I2C1_TX = 46 + DREQ_I2C1_RX = 47 + DREQ_ADC = 48 + DREQ_XIP_STREAM = 49 + DREQ_XIP_QMITX = 50 + DREQ_XIP_QMIRX = 51 + DREQ_HSTX = 52 + DREQ_CORESIGHT = 53 + DREQ_SHA256 = 54 ) // Configure configures the gpio pin as per mode. From 75cee78f606e79600b3c6713b5869d399cdc8f0f Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 10:03:24 +0200 Subject: [PATCH 06/16] Remove redundant DMA_ prefix --- src/machine/machine_rp2_spi.go | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine/machine_rp2_spi.go b/src/machine/machine_rp2_spi.go index b1787488e3..02fce1f575 100644 --- a/src/machine/machine_rp2_spi.go +++ b/src/machine/machine_rp2_spi.go @@ -297,10 +297,10 @@ func (spi *SPI) tx(tx []byte) error { var dreq uint32 if spi.Bus == rp.SPI0 { ch = &dmaChannels[spi0DMAChannel] - dreq = DMA_DREQ_SPI0_TX + dreq = DREQ_SPI0_TX } else { // SPI1 ch = &dmaChannels[spi1DMAChannel] - dreq = DMA_DREQ_SPI1_TX + dreq = DREQ_SPI1_TX } // Configure the DMA peripheral as follows: From a3c7c16e39c3243509808ad1f854b73f64400252 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 10:20:18 +0200 Subject: [PATCH 07/16] Correct name of Datasheet --- src/machine/machine_rp2_2040.go | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/machine_rp2_2040.go b/src/machine/machine_rp2_2040.go index e2454fa24e..a4d8c33a17 100644 --- a/src/machine/machine_rp2_2040.go +++ b/src/machine/machine_rp2_2040.go @@ -72,7 +72,7 @@ const ( // Additional definitions that are missing in generated src/device/rp/rp2040.go const ( - // from 2040 Datasheet: 2.5.3.1. System DREQ Table + // from RP2040 Datasheet: 2.5.3.1. System DREQ Table DREQ_PIO0_TX0 = 0 DREQ_PIO0_TX1 = 1 DREQ_PIO0_TX2 = 2 From 0fd8fadf4df153a7a1f480e0e21dd233d286cb2b Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 10:20:46 +0200 Subject: [PATCH 08/16] Correct name of Datasheet --- src/machine/machine_rp2_2350.go | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/machine_rp2_2350.go b/src/machine/machine_rp2_2350.go index ee20b25965..7b98820a38 100644 --- a/src/machine/machine_rp2_2350.go +++ b/src/machine/machine_rp2_2350.go @@ -123,7 +123,7 @@ const ( // Additional definitions that are missing in generated src/device/rp/rp2350.go const ( - // from 2350 Datasheet: 12.6.4.1. System DREQ Table + // from RP2350 Datasheet: 12.6.4.1. System DREQ Table DREQ_PIO0_TX0 = 0 DREQ_PIO0_TX1 = 1 DREQ_PIO0_TX2 = 2 From c7ed461cfba6661b9c72fcda450ff6465a2735b8 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 11:41:14 +0200 Subject: [PATCH 09/16] Refactor Move global definitions to device/rp/ --- src/machine/machine_rp2_spi.go | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine/machine_rp2_spi.go b/src/machine/machine_rp2_spi.go index 02fce1f575..d9cfc11d18 100644 --- a/src/machine/machine_rp2_spi.go +++ b/src/machine/machine_rp2_spi.go @@ -297,10 +297,10 @@ func (spi *SPI) tx(tx []byte) error { var dreq uint32 if spi.Bus == rp.SPI0 { ch = &dmaChannels[spi0DMAChannel] - dreq = DREQ_SPI0_TX + dreq = rp.DREQ_SPI0_TX } else { // SPI1 ch = &dmaChannels[spi1DMAChannel] - dreq = DREQ_SPI1_TX + dreq = rp.DREQ_SPI1_TX } // Configure the DMA peripheral as follows: From 52da289afdde9eb2efaeec869ea69b5262849383 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 12:00:40 +0200 Subject: [PATCH 10/16] Refactor --- src/device/rp/rp2040-plus.go | 51 ++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 src/device/rp/rp2040-plus.go diff --git a/src/device/rp/rp2040-plus.go b/src/device/rp/rp2040-plus.go new file mode 100644 index 0000000000..629ad3f43b --- /dev/null +++ b/src/device/rp/rp2040-plus.go @@ -0,0 +1,51 @@ +// Hand created file. DO NOT DELETE. +// Definitions that are missing in src/device/rp/rp2040.go generated from SVDs + +//go:build rp && rp2040 + +package rp + +// DMA: 2.5.3.1. System DREQ Table from RP2040 Datasheet +// https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf +const ( + DREQ_PIO0_TX0 = 0 + DREQ_PIO0_TX1 = 1 + DREQ_PIO0_TX2 = 2 + DREQ_PIO0_TX3 = 3 + DREQ_PIO0_RX0 = 4 + DREQ_PIO0_RX1 = 5 + DREQ_PIO0_RX2 = 6 + DREQ_PIO0_RX3 = 7 + DREQ_PIO1_TX0 = 8 + DREQ_PIO1_TX1 = 9 + DREQ_PIO1_TX2 = 10 + DREQ_PIO1_TX3 = 11 + DREQ_PIO1_RX0 = 12 + DREQ_PIO1_RX1 = 13 + DREQ_PIO1_RX2 = 14 + DREQ_PIO1_RX3 = 15 + DREQ_SPI0_TX = 16 + DREQ_SPI0_RX = 17 + DREQ_SPI1_TX = 18 + DREQ_SPI1_RX = 19 + DREQ_UART0_TX = 20 + DREQ_UART0_RX = 21 + DREQ_UART1_TX = 22 + DREQ_UART1_RX = 23 + DREQ_PWM_WRAP0 = 24 + DREQ_PWM_WRAP1 = 25 + DREQ_PWM_WRAP2 = 26 + DREQ_PWM_WRAP3 = 27 + DREQ_PWM_WRAP4 = 28 + DREQ_PWM_WRAP5 = 29 + DREQ_PWM_WRAP6 = 30 + DREQ_PWM_WRAP7 = 31 + DREQ_I2C0_TX = 32 + DREQ_I2C0_RX = 33 + DREQ_I2C1_TX = 34 + DREQ_I2C1_RX = 35 + DREQ_ADC = 36 + DREQ_XIP_STREAM = 37 + DREQ_XIP_SSITX = 38 + DREQ_XIP_SSIRX = 39 +) From fde6365446d7cf007439accd2bf7b366f7ddeec3 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 12:01:15 +0200 Subject: [PATCH 11/16] Refactor --- src/machine/machine_rp2_2040.go | 45 --------------------------------- 1 file changed, 45 deletions(-) diff --git a/src/machine/machine_rp2_2040.go b/src/machine/machine_rp2_2040.go index a4d8c33a17..9cdb3a072e 100644 --- a/src/machine/machine_rp2_2040.go +++ b/src/machine/machine_rp2_2040.go @@ -70,51 +70,6 @@ const ( numClocks ) -// Additional definitions that are missing in generated src/device/rp/rp2040.go -const ( - // from RP2040 Datasheet: 2.5.3.1. System DREQ Table - DREQ_PIO0_TX0 = 0 - DREQ_PIO0_TX1 = 1 - DREQ_PIO0_TX2 = 2 - DREQ_PIO0_TX3 = 3 - DREQ_PIO0_RX0 = 4 - DREQ_PIO0_RX1 = 5 - DREQ_PIO0_RX2 = 6 - DREQ_PIO0_RX3 = 7 - DREQ_PIO1_TX0 = 8 - DREQ_PIO1_TX1 = 9 - DREQ_PIO1_TX2 = 10 - DREQ_PIO1_TX3 = 11 - DREQ_PIO1_RX0 = 12 - DREQ_PIO1_RX1 = 13 - DREQ_PIO1_RX2 = 14 - DREQ_PIO1_RX3 = 15 - DREQ_SPI0_TX = 16 - DREQ_SPI0_RX = 17 - DREQ_SPI1_TX = 18 - DREQ_SPI1_RX = 19 - DREQ_UART0_TX = 20 - DREQ_UART0_RX = 21 - DREQ_UART1_TX = 22 - DREQ_UART1_RX = 23 - DREQ_PWM_WRAP0 = 24 - DREQ_PWM_WRAP1 = 25 - DREQ_PWM_WRAP2 = 26 - DREQ_PWM_WRAP3 = 27 - DREQ_PWM_WRAP4 = 28 - DREQ_PWM_WRAP5 = 29 - DREQ_PWM_WRAP6 = 30 - DREQ_PWM_WRAP7 = 31 - DREQ_I2C0_TX = 32 - DREQ_I2C0_RX = 33 - DREQ_I2C1_TX = 34 - DREQ_I2C1_RX = 35 - DREQ_ADC = 36 - DREQ_XIP_STREAM = 37 - DREQ_XIP_SSITX = 38 - DREQ_XIP_SSIRX = 39 -) - func calcClockDiv(srcFreq, freq uint32) uint32 { // Div register is 24.8 int.frac divider so multiply by 2^8 (left shift by 8) return uint32((uint64(srcFreq) << 8) / uint64(freq)) From 2d1bd29ac655a46b777217dffe3688e471eb1188 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 12:04:24 +0200 Subject: [PATCH 12/16] Refacture --- src/machine/machine_rp2_2350.go | 60 --------------------------------- 1 file changed, 60 deletions(-) diff --git a/src/machine/machine_rp2_2350.go b/src/machine/machine_rp2_2350.go index 7b98820a38..a6a6aa2eb1 100644 --- a/src/machine/machine_rp2_2350.go +++ b/src/machine/machine_rp2_2350.go @@ -121,66 +121,6 @@ const ( fnNULL pinFunc = 0x1f ) -// Additional definitions that are missing in generated src/device/rp/rp2350.go -const ( - // from RP2350 Datasheet: 12.6.4.1. System DREQ Table - DREQ_PIO0_TX0 = 0 - DREQ_PIO0_TX1 = 1 - DREQ_PIO0_TX2 = 2 - DREQ_PIO0_TX3 = 3 - DREQ_PIO0_RX0 = 4 - DREQ_PIO0_RX1 = 5 - DREQ_PIO0_RX2 = 6 - DREQ_PIO0_RX3 = 7 - DREQ_PIO1_TX0 = 8 - DREQ_PIO1_TX1 = 9 - DREQ_PIO1_TX2 = 10 - DREQ_PIO1_TX3 = 11 - DREQ_PIO1_RX0 = 12 - DREQ_PIO1_RX1 = 13 - DREQ_PIO1_RX2 = 14 - DREQ_PIO1_RX3 = 15 - DREQ_PIO2_TX0 = 16 - DREQ_PIO2_TX1 = 17 - DREQ_PIO2_TX2 = 18 - DREQ_PIO2_TX3 = 19 - DREQ_PIO2_RX0 = 20 - DREQ_PIO2_RX1 = 21 - DREQ_PIO2_RX2 = 22 - DREQ_PIO2_RX3 = 23 - DREQ_SPI0_TX = 24 - DREQ_SPI0_RX = 25 - DREQ_SPI1_TX = 26 - DREQ_SPI1_RX = 27 - DREQ_UART0_TX = 28 - DREQ_UART0_RX = 29 - DREQ_UART1_TX = 30 - DREQ_UART1_RX = 31 - DREQ_PWM_WRAP0 = 32 - DREQ_PWM_WRAP1 = 33 - DREQ_PWM_WRAP2 = 34 - DREQ_PWM_WRAP3 = 35 - DREQ_PWM_WRAP4 = 36 - DREQ_PWM_WRAP5 = 37 - DREQ_PWM_WRAP6 = 38 - DREQ_PWM_WRAP7 = 39 - DREQ_PWM_WRAP8 = 40 - DREQ_PWM_WRAP9 = 41 - DREQ_PWM_WRAP10 = 42 - DREQ_PWM_WRAP11 = 43 - DREQ_I2C0_TX = 44 - DREQ_I2C0_RX = 45 - DREQ_I2C1_TX = 46 - DREQ_I2C1_RX = 47 - DREQ_ADC = 48 - DREQ_XIP_STREAM = 49 - DREQ_XIP_QMITX = 50 - DREQ_XIP_QMIRX = 51 - DREQ_HSTX = 52 - DREQ_CORESIGHT = 53 - DREQ_SHA256 = 54 -) - // Configure configures the gpio pin as per mode. func (p Pin) Configure(config PinConfig) { if p == NoPin { From d2045d327dc5e108d56c347a0d98c2fef341ae4e Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 12:07:33 +0200 Subject: [PATCH 13/16] Refacture --- src/device/rp/rp2350-plus.go | 66 ++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 src/device/rp/rp2350-plus.go diff --git a/src/device/rp/rp2350-plus.go b/src/device/rp/rp2350-plus.go new file mode 100644 index 0000000000..eefe02b83f --- /dev/null +++ b/src/device/rp/rp2350-plus.go @@ -0,0 +1,66 @@ +// Hand created file. DO NOT DELETE. +// Definitions that are missing in src/device/rp/rp2040.go generated from SVDs + +//go:build rp && rp2350 + +package rp + +// DMA: 12.6.4.1. System DREQ Table from RP2040 Datasheet +// https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf +const ( + DREQ_PIO0_TX0 = 0 + DREQ_PIO0_TX1 = 1 + DREQ_PIO0_TX2 = 2 + DREQ_PIO0_TX3 = 3 + DREQ_PIO0_RX0 = 4 + DREQ_PIO0_RX1 = 5 + DREQ_PIO0_RX2 = 6 + DREQ_PIO0_RX3 = 7 + DREQ_PIO1_TX0 = 8 + DREQ_PIO1_TX1 = 9 + DREQ_PIO1_TX2 = 10 + DREQ_PIO1_TX3 = 11 + DREQ_PIO1_RX0 = 12 + DREQ_PIO1_RX1 = 13 + DREQ_PIO1_RX2 = 14 + DREQ_PIO1_RX3 = 15 + DREQ_PIO2_TX0 = 16 + DREQ_PIO2_TX1 = 17 + DREQ_PIO2_TX2 = 18 + DREQ_PIO2_TX3 = 19 + DREQ_PIO2_RX0 = 20 + DREQ_PIO2_RX1 = 21 + DREQ_PIO2_RX2 = 22 + DREQ_PIO2_RX3 = 23 + DREQ_SPI0_TX = 24 + DREQ_SPI0_RX = 25 + DREQ_SPI1_TX = 26 + DREQ_SPI1_RX = 27 + DREQ_UART0_TX = 28 + DREQ_UART0_RX = 29 + DREQ_UART1_TX = 30 + DREQ_UART1_RX = 31 + DREQ_PWM_WRAP0 = 32 + DREQ_PWM_WRAP1 = 33 + DREQ_PWM_WRAP2 = 34 + DREQ_PWM_WRAP3 = 35 + DREQ_PWM_WRAP4 = 36 + DREQ_PWM_WRAP5 = 37 + DREQ_PWM_WRAP6 = 38 + DREQ_PWM_WRAP7 = 39 + DREQ_PWM_WRAP8 = 40 + DREQ_PWM_WRAP9 = 41 + DREQ_PWM_WRAP10 = 42 + DREQ_PWM_WRAP11 = 43 + DREQ_I2C0_TX = 44 + DREQ_I2C0_RX = 45 + DREQ_I2C1_TX = 46 + DREQ_I2C1_RX = 47 + DREQ_ADC = 48 + DREQ_XIP_STREAM = 49 + DREQ_XIP_QMITX = 50 + DREQ_XIP_QMIRX = 51 + DREQ_HSTX = 52 + DREQ_CORESIGHT = 53 + DREQ_SHA256 = 54 +) From 27a15d2ec7f4692bfa3c7b0d1633f3bfa04717d5 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 12:42:17 +0200 Subject: [PATCH 14/16] Fix comments --- src/device/rp/rp2350-plus.go | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/device/rp/rp2350-plus.go b/src/device/rp/rp2350-plus.go index eefe02b83f..a380f0f108 100644 --- a/src/device/rp/rp2350-plus.go +++ b/src/device/rp/rp2350-plus.go @@ -1,11 +1,11 @@ // Hand created file. DO NOT DELETE. -// Definitions that are missing in src/device/rp/rp2040.go generated from SVDs +// Definitions that are missing in src/device/rp/rp2350.go generated from SVDs //go:build rp && rp2350 package rp -// DMA: 12.6.4.1. System DREQ Table from RP2040 Datasheet +// DMA: 12.6.4.1. System DREQ Table from RP2350 Datasheet // https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf const ( DREQ_PIO0_TX0 = 0 From 6568712b08e3d6ec0592f3b5bb630c2ed416a0f4 Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Thu, 22 May 2025 15:58:41 +0200 Subject: [PATCH 15/16] go fmt --- src/device/rp/rp2040-plus.go | 80 +++++++++++++------------- src/device/rp/rp2350-plus.go | 106 +++++++++++++++++------------------ 2 files changed, 93 insertions(+), 93 deletions(-) diff --git a/src/device/rp/rp2040-plus.go b/src/device/rp/rp2040-plus.go index 629ad3f43b..4ffbb5b109 100644 --- a/src/device/rp/rp2040-plus.go +++ b/src/device/rp/rp2040-plus.go @@ -5,47 +5,47 @@ package rp -// DMA: 2.5.3.1. System DREQ Table from RP2040 Datasheet +// DMA: 2.5.3.1. System DREQ Table from RP2040 Datasheet // https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf const ( - DREQ_PIO0_TX0 = 0 - DREQ_PIO0_TX1 = 1 - DREQ_PIO0_TX2 = 2 - DREQ_PIO0_TX3 = 3 - DREQ_PIO0_RX0 = 4 - DREQ_PIO0_RX1 = 5 - DREQ_PIO0_RX2 = 6 - DREQ_PIO0_RX3 = 7 - DREQ_PIO1_TX0 = 8 - DREQ_PIO1_TX1 = 9 - DREQ_PIO1_TX2 = 10 - DREQ_PIO1_TX3 = 11 - DREQ_PIO1_RX0 = 12 - DREQ_PIO1_RX1 = 13 - DREQ_PIO1_RX2 = 14 - DREQ_PIO1_RX3 = 15 - DREQ_SPI0_TX = 16 - DREQ_SPI0_RX = 17 - DREQ_SPI1_TX = 18 - DREQ_SPI1_RX = 19 - DREQ_UART0_TX = 20 - DREQ_UART0_RX = 21 - DREQ_UART1_TX = 22 - DREQ_UART1_RX = 23 - DREQ_PWM_WRAP0 = 24 - DREQ_PWM_WRAP1 = 25 - DREQ_PWM_WRAP2 = 26 - DREQ_PWM_WRAP3 = 27 - DREQ_PWM_WRAP4 = 28 - DREQ_PWM_WRAP5 = 29 - DREQ_PWM_WRAP6 = 30 - DREQ_PWM_WRAP7 = 31 - DREQ_I2C0_TX = 32 - DREQ_I2C0_RX = 33 - DREQ_I2C1_TX = 34 - DREQ_I2C1_RX = 35 - DREQ_ADC = 36 + DREQ_PIO0_TX0 = 0 + DREQ_PIO0_TX1 = 1 + DREQ_PIO0_TX2 = 2 + DREQ_PIO0_TX3 = 3 + DREQ_PIO0_RX0 = 4 + DREQ_PIO0_RX1 = 5 + DREQ_PIO0_RX2 = 6 + DREQ_PIO0_RX3 = 7 + DREQ_PIO1_TX0 = 8 + DREQ_PIO1_TX1 = 9 + DREQ_PIO1_TX2 = 10 + DREQ_PIO1_TX3 = 11 + DREQ_PIO1_RX0 = 12 + DREQ_PIO1_RX1 = 13 + DREQ_PIO1_RX2 = 14 + DREQ_PIO1_RX3 = 15 + DREQ_SPI0_TX = 16 + DREQ_SPI0_RX = 17 + DREQ_SPI1_TX = 18 + DREQ_SPI1_RX = 19 + DREQ_UART0_TX = 20 + DREQ_UART0_RX = 21 + DREQ_UART1_TX = 22 + DREQ_UART1_RX = 23 + DREQ_PWM_WRAP0 = 24 + DREQ_PWM_WRAP1 = 25 + DREQ_PWM_WRAP2 = 26 + DREQ_PWM_WRAP3 = 27 + DREQ_PWM_WRAP4 = 28 + DREQ_PWM_WRAP5 = 29 + DREQ_PWM_WRAP6 = 30 + DREQ_PWM_WRAP7 = 31 + DREQ_I2C0_TX = 32 + DREQ_I2C0_RX = 33 + DREQ_I2C1_TX = 34 + DREQ_I2C1_RX = 35 + DREQ_ADC = 36 DREQ_XIP_STREAM = 37 - DREQ_XIP_SSITX = 38 - DREQ_XIP_SSIRX = 39 + DREQ_XIP_SSITX = 38 + DREQ_XIP_SSIRX = 39 ) diff --git a/src/device/rp/rp2350-plus.go b/src/device/rp/rp2350-plus.go index a380f0f108..b39b01b23e 100644 --- a/src/device/rp/rp2350-plus.go +++ b/src/device/rp/rp2350-plus.go @@ -5,62 +5,62 @@ package rp -// DMA: 12.6.4.1. System DREQ Table from RP2350 Datasheet +// DMA: 12.6.4.1. System DREQ Table from RP2350 Datasheet // https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf const ( - DREQ_PIO0_TX0 = 0 - DREQ_PIO0_TX1 = 1 - DREQ_PIO0_TX2 = 2 - DREQ_PIO0_TX3 = 3 - DREQ_PIO0_RX0 = 4 - DREQ_PIO0_RX1 = 5 - DREQ_PIO0_RX2 = 6 - DREQ_PIO0_RX3 = 7 - DREQ_PIO1_TX0 = 8 - DREQ_PIO1_TX1 = 9 - DREQ_PIO1_TX2 = 10 - DREQ_PIO1_TX3 = 11 - DREQ_PIO1_RX0 = 12 - DREQ_PIO1_RX1 = 13 - DREQ_PIO1_RX2 = 14 - DREQ_PIO1_RX3 = 15 - DREQ_PIO2_TX0 = 16 - DREQ_PIO2_TX1 = 17 - DREQ_PIO2_TX2 = 18 - DREQ_PIO2_TX3 = 19 - DREQ_PIO2_RX0 = 20 - DREQ_PIO2_RX1 = 21 - DREQ_PIO2_RX2 = 22 - DREQ_PIO2_RX3 = 23 - DREQ_SPI0_TX = 24 - DREQ_SPI0_RX = 25 - DREQ_SPI1_TX = 26 - DREQ_SPI1_RX = 27 - DREQ_UART0_TX = 28 - DREQ_UART0_RX = 29 - DREQ_UART1_TX = 30 - DREQ_UART1_RX = 31 - DREQ_PWM_WRAP0 = 32 - DREQ_PWM_WRAP1 = 33 - DREQ_PWM_WRAP2 = 34 - DREQ_PWM_WRAP3 = 35 - DREQ_PWM_WRAP4 = 36 - DREQ_PWM_WRAP5 = 37 - DREQ_PWM_WRAP6 = 38 - DREQ_PWM_WRAP7 = 39 - DREQ_PWM_WRAP8 = 40 - DREQ_PWM_WRAP9 = 41 + DREQ_PIO0_TX0 = 0 + DREQ_PIO0_TX1 = 1 + DREQ_PIO0_TX2 = 2 + DREQ_PIO0_TX3 = 3 + DREQ_PIO0_RX0 = 4 + DREQ_PIO0_RX1 = 5 + DREQ_PIO0_RX2 = 6 + DREQ_PIO0_RX3 = 7 + DREQ_PIO1_TX0 = 8 + DREQ_PIO1_TX1 = 9 + DREQ_PIO1_TX2 = 10 + DREQ_PIO1_TX3 = 11 + DREQ_PIO1_RX0 = 12 + DREQ_PIO1_RX1 = 13 + DREQ_PIO1_RX2 = 14 + DREQ_PIO1_RX3 = 15 + DREQ_PIO2_TX0 = 16 + DREQ_PIO2_TX1 = 17 + DREQ_PIO2_TX2 = 18 + DREQ_PIO2_TX3 = 19 + DREQ_PIO2_RX0 = 20 + DREQ_PIO2_RX1 = 21 + DREQ_PIO2_RX2 = 22 + DREQ_PIO2_RX3 = 23 + DREQ_SPI0_TX = 24 + DREQ_SPI0_RX = 25 + DREQ_SPI1_TX = 26 + DREQ_SPI1_RX = 27 + DREQ_UART0_TX = 28 + DREQ_UART0_RX = 29 + DREQ_UART1_TX = 30 + DREQ_UART1_RX = 31 + DREQ_PWM_WRAP0 = 32 + DREQ_PWM_WRAP1 = 33 + DREQ_PWM_WRAP2 = 34 + DREQ_PWM_WRAP3 = 35 + DREQ_PWM_WRAP4 = 36 + DREQ_PWM_WRAP5 = 37 + DREQ_PWM_WRAP6 = 38 + DREQ_PWM_WRAP7 = 39 + DREQ_PWM_WRAP8 = 40 + DREQ_PWM_WRAP9 = 41 DREQ_PWM_WRAP10 = 42 DREQ_PWM_WRAP11 = 43 - DREQ_I2C0_TX = 44 - DREQ_I2C0_RX = 45 - DREQ_I2C1_TX = 46 - DREQ_I2C1_RX = 47 - DREQ_ADC = 48 + DREQ_I2C0_TX = 44 + DREQ_I2C0_RX = 45 + DREQ_I2C1_TX = 46 + DREQ_I2C1_RX = 47 + DREQ_ADC = 48 DREQ_XIP_STREAM = 49 - DREQ_XIP_QMITX = 50 - DREQ_XIP_QMIRX = 51 - DREQ_HSTX = 52 - DREQ_CORESIGHT = 53 - DREQ_SHA256 = 54 + DREQ_XIP_QMITX = 50 + DREQ_XIP_QMIRX = 51 + DREQ_HSTX = 52 + DREQ_CORESIGHT = 53 + DREQ_SHA256 = 54 ) From 2d79fcf93aeb136f91b8858da5f2d6786bd1e13d Mon Sep 17 00:00:00 2001 From: Rolf Sommerhalder Date: Sat, 24 May 2025 08:49:54 +0200 Subject: [PATCH 16/16] rename new non-generated files --- src/device/rp/{rp2040-plus.go => rp2040-extra.go} | 0 src/device/rp/{rp2350-plus.go => rp2350-extra.go} | 0 2 files changed, 0 insertions(+), 0 deletions(-) rename src/device/rp/{rp2040-plus.go => rp2040-extra.go} (100%) rename src/device/rp/{rp2350-plus.go => rp2350-extra.go} (100%) diff --git a/src/device/rp/rp2040-plus.go b/src/device/rp/rp2040-extra.go similarity index 100% rename from src/device/rp/rp2040-plus.go rename to src/device/rp/rp2040-extra.go diff --git a/src/device/rp/rp2350-plus.go b/src/device/rp/rp2350-extra.go similarity index 100% rename from src/device/rp/rp2350-plus.go rename to src/device/rp/rp2350-extra.go