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lines changed Original file line number Diff line number Diff line change @@ -23,15 +23,6 @@ func InitADC() {
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// Enable ADC clock
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enableAltFuncClock (unsafe .Pointer (stm32 .ADC1 ))
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- // set scan mode
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- stm32 .ADC1 .CR1 .SetBits (stm32 .ADC_CR1_SCAN )
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-
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- // clear CONT, ALIGN, EXTRIG and EXTSEL bits from CR2
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- stm32 .ADC1 .CR2 .ClearBits (stm32 .ADC_CR2_CONT | stm32 .ADC_CR2_ALIGN | stm32 .ADC_CR2_EXTTRIG_Msk | stm32 .ADC_CR2_EXTSEL_Msk )
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-
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- stm32 .ADC1 .SQR1 .ClearBits (stm32 .ADC_SQR1_L_Msk )
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- stm32 .ADC1 .SQR1 .SetBits (2 << stm32 .ADC_SQR1_L_Pos ) // 2 means 3 conversions
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-
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// enable
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stm32 .ADC1 .CR2 .SetBits (stm32 .ADC_CR2_ADON )
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@@ -61,7 +52,7 @@ func (a ADC) Get() uint16 {
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stm32 .ADC1 .SQR3 .SetBits (ch )
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// start conversion
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- stm32 .ADC1 .CR2 .SetBits (stm32 .ADC_CR2_SWSTART )
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+ stm32 .ADC1 .CR2 .SetBits (stm32 .ADC_CR2_ADON )
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// wait for conversion to complete
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for ! stm32 .ADC1 .SR .HasBits (stm32 .ADC_SR_EOC ) {
@@ -70,12 +61,6 @@ func (a ADC) Get() uint16 {
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// read result as 16 bit value
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result := uint16 (stm32 .ADC1 .DR .Get ()) << 4
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- // clear flag
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- stm32 .ADC1 .SR .ClearBits (stm32 .ADC_SR_EOC )
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-
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- // clear rank
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- stm32 .ADC1 .SQR3 .ClearBits (ch )
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-
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return result
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}
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Original file line number Diff line number Diff line change @@ -221,14 +221,19 @@ func (p Pin) enableClock() {
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// Enable peripheral clock. Expand to include all the desired peripherals
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func enableAltFuncClock (bus unsafe.Pointer ) {
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- if bus == unsafe .Pointer (stm32 .USART1 ) {
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+ switch bus {
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+ case unsafe .Pointer (stm32 .USART1 ):
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stm32 .RCC .APB2ENR .SetBits (stm32 .RCC_APB2ENR_USART1EN )
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- } else if bus == unsafe .Pointer (stm32 .USART2 ) {
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+ case unsafe .Pointer (stm32 .USART2 ):
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stm32 .RCC .APB1ENR .SetBits (stm32 .RCC_APB1ENR_USART2EN )
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- } else if bus == unsafe .Pointer (stm32 .I2C1 ) {
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+ case unsafe .Pointer (stm32 .I2C1 ):
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stm32 .RCC .APB1ENR .SetBits (stm32 .RCC_APB1ENR_I2C1EN )
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- } else if bus == unsafe .Pointer (stm32 .SPI1 ) {
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+ case unsafe .Pointer (stm32 .SPI1 ):
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stm32 .RCC .APB2ENR .SetBits (stm32 .RCC_APB2ENR_SPI1EN )
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+ case unsafe .Pointer (stm32 .ADC1 ):
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+ stm32 .RCC .APB2ENR .SetBits (stm32 .RCC_APB2ENR_ADC1EN )
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+ default :
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+ panic ("machine: unknown peripheral" )
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}
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}
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Original file line number Diff line number Diff line change @@ -33,10 +33,11 @@ func buffered() int {
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// initCLK sets clock to 72MHz using HSE 8MHz crystal w/ PLL X 9 (8MHz x 9 = 72MHz).
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func initCLK () {
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- stm32 .FLASH .ACR .SetBits (stm32 .FLASH_ACR_LATENCY_WS2 ) // Two wait states, per datasheet
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- stm32 .RCC .CFGR .SetBits (stm32 .RCC_CFGR_PPRE1_Div2 << stm32 .RCC_CFGR_PPRE1_Pos ) // prescale PCLK1 = HCLK/2
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- stm32 .RCC .CFGR .SetBits (stm32 .RCC_CFGR_PPRE2_Div1 << stm32 .RCC_CFGR_PPRE2_Pos ) // prescale PCLK2 = HCLK/1
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- stm32 .RCC .CR .SetBits (stm32 .RCC_CR_HSEON ) // enable HSE clock
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+ stm32 .FLASH .ACR .SetBits (stm32 .FLASH_ACR_LATENCY_WS2 ) // Two wait states, per datasheet
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+ stm32 .RCC .CFGR .SetBits (stm32 .RCC_CFGR_PPRE1_Div2 << stm32 .RCC_CFGR_PPRE1_Pos ) // prescale PCLK1 = HCLK/2
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+ stm32 .RCC .CFGR .SetBits (stm32 .RCC_CFGR_PPRE2_Div1 << stm32 .RCC_CFGR_PPRE2_Pos ) // prescale PCLK2 = HCLK/1
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+ stm32 .RCC .CFGR .SetBits (stm32 .RCC_CFGR_ADCPRE_Div6 << stm32 .RCC_CFGR_ADCPRE_Pos ) // prescale ADCCLK = PCLK2/6
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+ stm32 .RCC .CR .SetBits (stm32 .RCC_CR_HSEON ) // enable HSE clock
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// wait for the HSEREADY flag
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for ! stm32 .RCC .CR .HasBits (stm32 .RCC_CR_HSERDY ) {
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