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machine: replace hard-coded cpu frequencies on rp2xxx (#4767)
Missed from the earlier change that bumped the rp2350 frequency.
1 parent 64d8a04 commit 20fc814

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3 files changed

+11
-11
lines changed

3 files changed

+11
-11
lines changed

src/machine/machine_rp2_clocks.go

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,7 @@ var pllsysFB, pllsysPD1, pllsysPD2 uint32
144144
// Note that the entire init function is computed at compile time
145145
// by interp.
146146
func init() {
147-
fb, _, pd1, pd2, err := pllSearch{LockRefDiv: 1}.CalcDivs(xoscFreq*MHz, uint64(CPUFrequency()), MHz)
147+
fb, _, pd1, pd2, err := pllSearch{LockRefDiv: 1}.CalcDivs(xoscFreq*MHz, cpuFreq, MHz)
148148
if err != nil {
149149
panic(err)
150150
}
@@ -185,15 +185,15 @@ func (clks *clocksType) init() {
185185
cref := clks.clock(clkRef)
186186
cref.configure(rp.CLOCKS_CLK_REF_CTRL_SRC_XOSC_CLKSRC,
187187
0, // No aux mux
188-
12*MHz,
189-
12*MHz)
188+
xoscFreq,
189+
xoscFreq)
190190

191191
// clkSys = pllSys (125MHz) / 1 = 125MHz
192192
csys := clks.clock(clkSys)
193193
csys.configure(rp.CLOCKS_CLK_SYS_CTRL_SRC_CLKSRC_CLK_SYS_AUX,
194194
rp.CLOCKS_CLK_SYS_CTRL_AUXSRC_CLKSRC_PLL_SYS,
195-
125*MHz,
196-
125*MHz)
195+
cpuFreq,
196+
cpuFreq)
197197

198198
// clkUSB = pllUSB (48MHz) / 1 = 48MHz
199199
cusb := clks.clock(clkUSB)
@@ -217,8 +217,8 @@ func (clks *clocksType) init() {
217217
cperi := clks.clock(clkPeri)
218218
cperi.configure(0,
219219
rp.CLOCKS_CLK_PERI_CTRL_AUXSRC_CLK_SYS,
220-
125*MHz,
221-
125*MHz)
220+
cpuFreq,
221+
cpuFreq)
222222

223223
clks.initTicks()
224224
}

src/machine/machine_rp2_spi.go

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -104,13 +104,13 @@ func (spi SPI) Transfer(w byte) (byte, error) {
104104
}
105105

106106
func (spi SPI) SetBaudRate(br uint32) error {
107-
const freqin uint32 = 125 * MHz
108107
const maxBaud uint32 = 66.5 * MHz // max output frequency is 66.5MHz on rp2040. see Note page 527.
109108
// Find smallest prescale value which puts output frequency in range of
110109
// post-divide. Prescale is an even number from 2 to 254 inclusive.
111110
var prescale, postdiv uint32
111+
freq := CPUFrequency()
112112
for prescale = 2; prescale < 255; prescale += 2 {
113-
if freqin < (prescale+2)*256*br {
113+
if freq < (prescale+2)*256*br {
114114
break
115115
}
116116
}
@@ -120,7 +120,7 @@ func (spi SPI) SetBaudRate(br uint32) error {
120120
// Find largest post-divide which makes output <= baudrate. Post-divide is
121121
// an integer in the range 1 to 256 inclusive.
122122
for postdiv = 256; postdiv > 1; postdiv-- {
123-
if freqin/(prescale*(postdiv-1)) > br {
123+
if freq/(prescale*(postdiv-1)) > br {
124124
break
125125
}
126126
}

src/machine/machine_rp2_uart.go

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ func (uart *UART) Configure(config UARTConfig) error {
7575

7676
// SetBaudRate sets the baudrate to be used for the UART.
7777
func (uart *UART) SetBaudRate(br uint32) {
78-
div := 8 * 125 * MHz / br
78+
div := 8 * CPUFrequency() / br
7979

8080
ibrd := div >> 7
8181
var fbrd uint32

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