Project: Multilayer_SMA2Microstrip #88
Replies: 10 comments 21 replies
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Really excellent write up !
It really is. I think this is a really nice test case since one of the drawback to FDTD is the staircasing on curved sections. Even with the subgridding I would think that the gird would have to be extremely fine for this problem, it's a good example of a situation where FE methods might be more efficent.
I noticed that S21 in your simulations does not have a slope.
Thanks very much for taking the time to publish these results ! |
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yes, the issue is the number of cells that you need to get the desired accuracy. I have not seen good comparisons of FDTD vs FEM, and I would suspect that it's problem dependent. However for something with a lot of arcs/curves you would think that FE would be more efficient.
The metal surface is probably being treated as PEC, and so there is not skin depth loss. This something to look into and could be a nice OpenEMS project for me to add it ;-)
Please check your Multilayer_SMA2Microstrip github project. I have opened two issues. I can't get the project to run :-( |
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I was successful in making the project run after what basically were very minor issues 1 the necessary paths for octave were not set 2 there were some problems with the file paths using "\" instead of "/"
And still one minor problem in that read_touchstone appears to be missing. I did find it in openEMS/CTB, I just need to copy it over or add another octave path variable. Only 16 minutes ! I think that is quite good for a project of this complexity. I have run similar projects in other EM tools and they have tended to run slower than this , even with parallelization across many cores. |
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Using my experimental diamond tiling engine (currently under development), this project achieved a 400% speedup. |
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openEMS does not have out-of-the-box support for materials with frequency-dependent permittivity. But openEMS includes model for Drude and Lorentz materials, and they can be used to model frequency-dependent PCB material. See:
The workflow is basically:
Proprietary field solvers often include a database of common materials. I found one field solver claims they have the largest database because they went through the trouble of fitting a lot of materials. I do not know if an open database exists. |
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One solution used in commercial FDTD is to model hollow thick metal conductors, with zero thickness surface sheets all around. Surface impedance of these sheets then includes skin effect, similar to the openEMS conducting sheet model. In openEMS, I actually modelled skin effect in RFIC transmission lines (where all dimensions are rather small) by meshing into skin depth with sub-micron mesh density. This was required because these lines can't be considered flat, thickness matters for the actual EM solution. Results are quite good, but this simulation is slow due to small timestep and many cells ... not a solution for PCB. Regarding RF losses in PCB lines, my experience is that it's dielectric loss that matters most. We really need to include loss tangent in these cases, it has much more effect that conductor loss. Those expensive low loss RF substrates have the same copper as normal PCB, but very low loss dielectrics. |
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All of these are variations on a similar problem, simulating thin metals where the grid density would be too small.
LOL. |
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For the testcase shown here, I would use openEMS thin metal model with built-in skin loss (AddConductingSheet) instead of generic material (AddMaterial). There is no relevant side wall coupling, and the benefit of including physical metal thickness in the actual field solution is very small here. The thin sheet model (with surface impedance including skin effect) should work well here, it captures skin effect and and there is no trouble with small mesh cells. AddConductingSheet example is included for Matlab: openEMS\matlab\examples\transmission_lines\MSL_Losses.m |
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I've been doing a preliminary search, and it looks like this is handled using what's called a surface impedance boundary condition. The technique is, not surprisingly, quite old. It appears to fold into the FD scheme cleanly, but i haven't spent too much time on it , so I could be completely wrong. I'm also fairly certain that I've seen someone else in another discussion thread mention that technique also.
That is indeed an underrated problem. Especially significant for high speed digital where the substrate may only 100um and the soldermask 25u. The soldermask has (can have) a high dielectric constant and is definitely not low loss. LOL. Once again this all points to why FE has, in many cases, taken over the EM simulation space. Sure you end up with a very fine mesh in those areas, but it happens "automagically" and you can simply enter material parameters and be done with it. Then you throw 40 or 50 cores at your problem and don't worry about it. In the commercial space this is what happens. However those extra cores cost money (the software charges for them !!), so there is an advantage to having efficient handling of these situations whenever possible. However I'm having doubts about whether that's really true. This problem, for it's complexity, and the fine mesh that it uses, simulates quite fast. Remember I only have 8 cores ! I have absolutely simulated problems of similar complexity on "fast machines" with commercial software and they have taken as long or longer. |
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@toammann Lovely stuff! I found this while trying to teach myself something about this topic (as a hobby). Reading your work is enlightening, so thanks for sharing! One thing I'm curious about is the capacitive compensation structure, and in particular how you arrived at it? Perhaps a discontinuity and its location was discovered by TDR? And I wonder if you could say something about the structure itself? I don't know what I'm looking at, though it looks kinda like a tiny stepped impedance filter or something. Any pointers for a novice would be appreciated! Thanks again! |
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Hello,
I have just finished my SMA coaxial to microstrip transistion project using open source software only (mainly openEMS).
The final result is an easy-to-use KiCAD footprint. The footprint was designed for the Rosenberger 32K242-40ML5 SMA connector on an low-cost AISLER 6-layer FR4 stackup:
This is my first project using openEMS. I am very surprised how well this solver works. The report also contains a VNA measurement. I think it is very important to publibsh measured results side by side with simulated ones. This will greatly improve the confidence in the simulator and hopefully attract more users - which in turn results in more documentation especially for beginners.
The boards were fabricated by AISLER a German rapid PCB prototyping service. Starting from 12/2022 they have released a new FR4 6-layer PCB stackup that should works well for RF projects. One very nice feature of AISLER is that "Castellated Holes" are free. I had the idea to abuse this castellated hole feature to create a short piece of edge metallization.
Please find the project documentation here:
GitHub Multilayer_SMA2Microstrip
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