Optimize atomic floats on nvptx #34
Description
The CPU targets do not have instructions for atomic float (UPDATE: AArch64 now has FEAT_LSFE (#201)), but the GPU targets have these instructions.
- load https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-ld
- store https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-st
- RMW https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-atom