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Add compare_exchange, compare_exchange_weak, and fetch_update
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CHANGELOG.md

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## [Unreleased]
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- Add `compare_exchange`, `compare_exchange_weak`, and `fetch_update`.
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- Support x86_64 128-bit atomics when the `cmpxchg16b` target feature is enabled at compile-time.
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## [0.2.8] - 2022-06-21

README.md

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Currently, x86, x86_64, ARM (v6-m, v7+), AArch64, RISC-V, MIPS32r2, MIPS64r2, PowerPC, and s390x are supported.
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| target_arch | primitives | [load]/[store] | [swap] |
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| --------------------------------- | --------------------------------------------------- |:--------------:|:------:|
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| x86 | isize,usize,i8,u8,i16,u16,i32,u32 | | |
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| x86_64 | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 | | |
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| x86_64 (+cmpxchg16b) | i128,u128 | | |
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| arm (v6-m, v7+) | isize,usize,i8,u8,i16,u16,i32,u32 | |\[1] |
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| arm (v7-a) | i64,u64 | | |
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| aarch64 \[2] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 | | |
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| riscv32 | isize,usize,i8,u8,i16,u16,i32,u32 | |\[1] |
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| riscv64 | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 | |\[1] |
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| mips \[3] | isize,usize,i8,u8,i16,u16,i32,u32 | | |
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| mips64 \[3] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 | | |
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| powerpc \[3] | isize,usize,i8,u8,i16,u16,i32,u32 | | |
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| powerpc64 \[3] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 | | |
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| powerpc64 (le or pwr8+) \[3] \[4] | i128,u128 | | |
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| s390x \[3] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 | | |
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\[1] ARM's atomic swap is not available on v6-m (thumbv6m). RISC-V's atomic swap is not available on targets without the A (or G) extension such as riscv32i, riscv32imc, etc.<br>
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| target_arch | primitives | load/store | RMW |
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| --------------------------------- | --------------------------------------------------- |:----------:|:-----:|
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| x86 | isize,usize,i8,u8,i16,u16,i32,u32 |||
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| x86_64 | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 |||
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| x86_64 (+cmpxchg16b) | i128,u128 |||
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| arm (v6-m, v7+) | isize,usize,i8,u8,i16,u16,i32,u32 ||\[1] |
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| arm (v7-a) | i64,u64 |||
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| aarch64 \[2] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 |||
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| riscv32 | isize,usize,i8,u8,i16,u16,i32,u32 ||\[1] |
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| riscv64 | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 ||\[1] |
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| mips \[3] | isize,usize,i8,u8,i16,u16,i32,u32 |||
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| mips64 \[3] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 |||
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| powerpc \[3] | isize,usize,i8,u8,i16,u16,i32,u32 |||
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| powerpc64 \[3] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64 |||
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| powerpc64 (le or pwr8+) \[3] \[4] | i128,u128 |||
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| s390x \[3] | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 |||
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\[1] ARM's atomic RMW operations are not available on v6-m (thumbv6m). RISC-V's atomic RMW operations are not available on targets without the A (or G) extension such as riscv32i, riscv32imc, etc.<br>
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\[2] If target features such as `lse` and `lse2` are enabled at compile-time, more efficient instructions are used.<br>
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\[3] Requires nightly due to `#![feature(asm_experimental_arch)]`.<br>
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\[4] target-cpu `pwr8`, `pwr9`, or `pwr10`.<br>
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- [portable-atomic]: Portable atomic types including support for 128-bit atomics, atomic float, etc.
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- [atomic-memcpy]: Byte-wise atomic memcpy.
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[load]: https://docs.rs/atomic-maybe-uninit/latest/atomic_maybe_uninit/struct.AtomicMaybeUninit.html#method.load
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[store]: https://docs.rs/atomic-maybe-uninit/latest/atomic_maybe_uninit/struct.AtomicMaybeUninit.html#method.store
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[swap]: https://docs.rs/atomic-maybe-uninit/latest/atomic_maybe_uninit/struct.AtomicMaybeUninit.html#method.swap
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[atomic-memcpy]: https://github.com/taiki-e/atomic-memcpy
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[portable-atomic]: https://github.com/taiki-e/portable-atomic
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[undefined-behavior]: https://doc.rust-lang.org/reference/behavior-considered-undefined.html

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