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I noticed that FECdecoder appears to implement a trellis decoder. Will this work with the P25 control channel (assuming you initialize it the same way as in dstar_header_decode)?
The text was updated successfully, but these errors were encountered:
I doubt it. On the P25 training guide document it says that the TSBK uses a "Rate 1/2 Trellis Encoder (196,96)." On the FECdecoder method it seems that 660 bits get in and 660 get out... Given the lack of documentation on the code we need to refer to the DSTAR header specs to understand what it does.
On the other hand the TIA 102.BAAA document (it's your friend) gives some details on the Trellis 1/2 codes used for P25 data packets, probably they use the same on the TSBK.
I noticed that FECdecoder appears to implement a trellis decoder. Will this work with the P25 control channel (assuming you initialize it the same way as in dstar_header_decode)?
The text was updated successfully, but these errors were encountered: