models: Select coreboot TPM_PPI

crawfxrd · crawfxrd · commit 5ea0ba7378dd · 2024-12-24T10:19:14.000-07:00
We don't use coreboot's PAYLOAD_EDK2, so this option is not getting
selected by default. Replaces the stub PPI with the full implementation.

Signed-off-by: Tim Crawford &lt;tcrawford@system76.com&gt;
diff --git a/models/addw1/coreboot.config b/models/addw1/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/addw2/coreboot.config b/models/addw2/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/addw3/coreboot.config b/models/addw3/coreboot.config
@@ -16,6 +16,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/addw4/coreboot.config b/models/addw4/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/bonw14/coreboot.config b/models/bonw14/coreboot.config
@@ -15,6 +15,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/bonw15-b/coreboot.config b/models/bonw15-b/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x400000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/bonw15/coreboot.config b/models/bonw15/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp10-b/coreboot.config b/models/darp10-b/coreboot.config
@@ -15,6 +15,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp10/coreboot.config b/models/darp10/coreboot.config
@@ -15,6 +15,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp5/coreboot.config b/models/darp5/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp6/coreboot.config b/models/darp6/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp7/coreboot.config b/models/darp7/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp8/coreboot.config b/models/darp8/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/darp9/coreboot.config b/models/darp9/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/galp2/coreboot.config b/models/galp2/coreboot.config
@@ -13,6 +13,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_ME_CLEANER=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
diff --git a/models/galp3-b/coreboot.config b/models/galp3-b/coreboot.config
@@ -13,6 +13,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_ME_CLEANER=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
diff --git a/models/galp3-c/coreboot.config b/models/galp3-c/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/galp3/coreboot.config b/models/galp3/coreboot.config
@@ -13,6 +13,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_ME_CLEANER=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
diff --git a/models/galp4/coreboot.config b/models/galp4/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/galp5/coreboot.config b/models/galp5/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/galp6/coreboot.config b/models/galp6/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/galp7/coreboot.config b/models/galp7/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze14_1650/coreboot.config b/models/gaze14_1650/coreboot.config
@@ -11,6 +11,7 @@ CONFIG_PAYLOAD_ELF=y
 CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze14_1660ti/coreboot.config b/models/gaze14_1660ti/coreboot.config
@@ -11,6 +11,7 @@ CONFIG_PAYLOAD_ELF=y
 CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze15/coreboot.config b/models/gaze15/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze16-3050/coreboot.config b/models/gaze16-3050/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze16-3060-b/coreboot.config b/models/gaze16-3060-b/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze16-3060/coreboot.config b/models/gaze16-3060/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze17-3050/coreboot.config b/models/gaze17-3050/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze17-3060-b/coreboot.config b/models/gaze17-3060-b/coreboot.config
@@ -16,6 +16,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/gaze18/coreboot.config b/models/gaze18/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/lemp10/coreboot.config b/models/lemp10/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/lemp11/coreboot.config b/models/lemp11/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/lemp12/coreboot.config b/models/lemp12/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/lemp13-b/coreboot.config b/models/lemp13-b/coreboot.config
@@ -17,6 +17,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/lemp13/coreboot.config b/models/lemp13/coreboot.config
@@ -17,6 +17,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/lemp9/coreboot.config b/models/lemp9/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/meer9/coreboot.config b/models/meer9/coreboot.config
@@ -16,6 +16,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 # Debug
diff --git a/models/oryp10/coreboot.config b/models/oryp10/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/oryp11/coreboot.config b/models/oryp11/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/oryp12/coreboot.config b/models/oryp12/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/oryp5/coreboot.config b/models/oryp5/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/oryp6/coreboot.config b/models/oryp6/coreboot.config
@@ -13,6 +13,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/oryp7/coreboot.config b/models/oryp7/coreboot.config
@@ -13,6 +13,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/oryp8/coreboot.config b/models/oryp8/coreboot.config
@@ -14,6 +14,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/oryp9/coreboot.config b/models/oryp9/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
diff --git a/models/serw13/coreboot.config b/models/serw13/coreboot.config
@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
+CONFIG_TPM_PPI=y
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
 #CONFIG_CONSOLE_SYSTEM76_EC=y
