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[VE] Solve merge coflicts
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-24
lines changed

8 files changed

+24
-24
lines changed

‎llvm/test/CodeGen/VE/Packed/vp_add.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_add_v512i32_vv(<512 x i32> %i0, <512 x i32> %
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvaddu %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvaddu %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.add.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -27,7 +27,7 @@ define fastcc <512 x i32> @test_vp_add_v512i32_rv(i32 %s0, <512 x i32> %i1, <512
2727
; CHECK-NEXT: and %s1, %s1, (32)0
2828
; CHECK-NEXT: srl %s1, %s1, 1
2929
; CHECK-NEXT: lvl %s1
30-
; CHECK-NEXT: pvaddu %v0, %s0, %v0, %vm2
30+
; CHECK-NEXT: pvaddu %v0, %s0, %v0
3131
; CHECK-NEXT: b.l.t (, %s10)
3232
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3333
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -46,7 +46,7 @@ define fastcc <512 x i32> @test_vp_add_v512i32_vr(<512 x i32> %i0, i32 %s1, <512
4646
; CHECK-NEXT: and %s1, %s1, (32)0
4747
; CHECK-NEXT: srl %s1, %s1, 1
4848
; CHECK-NEXT: lvl %s1
49-
; CHECK-NEXT: pvaddu %v0, %s0, %v0, %vm2
49+
; CHECK-NEXT: pvaddu %v0, %s0, %v0
5050
; CHECK-NEXT: b.l.t (, %s10)
5151
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5252
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

‎llvm/test/CodeGen/VE/Packed/vp_and.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_and_v512i32_vv(<512 x i32> %i0, <512 x i32> %
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvand %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvand %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.and.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -27,7 +27,7 @@ define fastcc <512 x i32> @test_vp_and_v512i32_rv(i32 %s0, <512 x i32> %i1, <512
2727
; CHECK-NEXT: and %s1, %s1, (32)0
2828
; CHECK-NEXT: srl %s1, %s1, 1
2929
; CHECK-NEXT: lvl %s1
30-
; CHECK-NEXT: pvand %v0, %s0, %v0, %vm2
30+
; CHECK-NEXT: pvand %v0, %s0, %v0
3131
; CHECK-NEXT: b.l.t (, %s10)
3232
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3333
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -46,7 +46,7 @@ define fastcc <512 x i32> @test_vp_and_v512i32_vr(<512 x i32> %i0, i32 %s1, <512
4646
; CHECK-NEXT: and %s1, %s1, (32)0
4747
; CHECK-NEXT: srl %s1, %s1, 1
4848
; CHECK-NEXT: lvl %s1
49-
; CHECK-NEXT: pvand %v0, %s0, %v0, %vm2
49+
; CHECK-NEXT: pvand %v0, %s0, %v0
5050
; CHECK-NEXT: b.l.t (, %s10)
5151
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5252
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

‎llvm/test/CodeGen/VE/Packed/vp_or.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_or_v512i32_vv(<512 x i32> %i0, <512 x i32> %i
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvor %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvor %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.or.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -27,7 +27,7 @@ define fastcc <512 x i32> @test_vp_or_v512i32_rv(i32 %s0, <512 x i32> %i1, <512
2727
; CHECK-NEXT: and %s1, %s1, (32)0
2828
; CHECK-NEXT: srl %s1, %s1, 1
2929
; CHECK-NEXT: lvl %s1
30-
; CHECK-NEXT: pvor %v0, %s0, %v0, %vm2
30+
; CHECK-NEXT: pvor %v0, %s0, %v0
3131
; CHECK-NEXT: b.l.t (, %s10)
3232
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3333
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -46,7 +46,7 @@ define fastcc <512 x i32> @test_vp_or_v512i32_vr(<512 x i32> %i0, i32 %s1, <512
4646
; CHECK-NEXT: and %s1, %s1, (32)0
4747
; CHECK-NEXT: srl %s1, %s1, 1
4848
; CHECK-NEXT: lvl %s1
49-
; CHECK-NEXT: pvor %v0, %s0, %v0, %vm2
49+
; CHECK-NEXT: pvor %v0, %s0, %v0
5050
; CHECK-NEXT: b.l.t (, %s10)
5151
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5252
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

‎llvm/test/CodeGen/VE/Packed/vp_shl.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_shl_v512i32_vv(<512 x i32> %i0, <512 x i32> %
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvsll %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvsll %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.shl.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -30,7 +30,7 @@ define fastcc <512 x i32> @test_vp_shl_v512i32_rv(i32 %s0, <512 x i32> %i1, <512
3030
; CHECK-NEXT: and %s0, %s0, (32)0
3131
; CHECK-NEXT: srl %s0, %s0, 1
3232
; CHECK-NEXT: lvl %s0
33-
; CHECK-NEXT: pvsll %v0, %v1, %v0, %vm2
33+
; CHECK-NEXT: pvsll %v0, %v1, %v0
3434
; CHECK-NEXT: b.l.t (, %s10)
3535
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3636
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -49,7 +49,7 @@ define fastcc <512 x i32> @test_vp_shl_v512i32_vr(<512 x i32> %i0, i32 %s1, <512
4949
; CHECK-NEXT: and %s1, %s1, (32)0
5050
; CHECK-NEXT: srl %s1, %s1, 1
5151
; CHECK-NEXT: lvl %s1
52-
; CHECK-NEXT: pvsll %v0, %v0, %s0, %vm2
52+
; CHECK-NEXT: pvsll %v0, %v0, %s0
5353
; CHECK-NEXT: b.l.t (, %s10)
5454
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5555
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

‎llvm/test/CodeGen/VE/Packed/vp_sra.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_ashr_v512i32_vv(<512 x i32> %i0, <512 x i32>
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvsra %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvsra %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.ashr.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -30,7 +30,7 @@ define fastcc <512 x i32> @test_vp_ashr_v512i32_rv(i32 %s0, <512 x i32> %i1, <51
3030
; CHECK-NEXT: and %s0, %s0, (32)0
3131
; CHECK-NEXT: srl %s0, %s0, 1
3232
; CHECK-NEXT: lvl %s0
33-
; CHECK-NEXT: pvsra %v0, %v1, %v0, %vm2
33+
; CHECK-NEXT: pvsra %v0, %v1, %v0
3434
; CHECK-NEXT: b.l.t (, %s10)
3535
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3636
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -49,7 +49,7 @@ define fastcc <512 x i32> @test_vp_ashr_v512i32_vr(<512 x i32> %i0, i32 %s1, <51
4949
; CHECK-NEXT: and %s1, %s1, (32)0
5050
; CHECK-NEXT: srl %s1, %s1, 1
5151
; CHECK-NEXT: lvl %s1
52-
; CHECK-NEXT: pvsra %v0, %v0, %s0, %vm2
52+
; CHECK-NEXT: pvsra %v0, %v0, %s0
5353
; CHECK-NEXT: b.l.t (, %s10)
5454
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5555
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

‎llvm/test/CodeGen/VE/Packed/vp_srl.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_lshr_v512i32_vv(<512 x i32> %i0, <512 x i32>
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvsrl %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvsrl %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.lshr.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -30,7 +30,7 @@ define fastcc <512 x i32> @test_vp_lshr_v512i32_rv(i32 %s0, <512 x i32> %i1, <51
3030
; CHECK-NEXT: and %s0, %s0, (32)0
3131
; CHECK-NEXT: srl %s0, %s0, 1
3232
; CHECK-NEXT: lvl %s0
33-
; CHECK-NEXT: pvsrl %v0, %v1, %v0, %vm2
33+
; CHECK-NEXT: pvsrl %v0, %v1, %v0
3434
; CHECK-NEXT: b.l.t (, %s10)
3535
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3636
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -49,7 +49,7 @@ define fastcc <512 x i32> @test_vp_lshr_v512i32_vr(<512 x i32> %i0, i32 %s1, <51
4949
; CHECK-NEXT: and %s1, %s1, (32)0
5050
; CHECK-NEXT: srl %s1, %s1, 1
5151
; CHECK-NEXT: lvl %s1
52-
; CHECK-NEXT: pvsrl %v0, %v0, %s0, %vm2
52+
; CHECK-NEXT: pvsrl %v0, %v0, %s0
5353
; CHECK-NEXT: b.l.t (, %s10)
5454
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5555
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

‎llvm/test/CodeGen/VE/Packed/vp_sub.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_sub_v512i32_vv(<512 x i32> %i0, <512 x i32> %
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvsubu %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvsubu %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.sub.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -27,7 +27,7 @@ define fastcc <512 x i32> @test_vp_sub_v512i32_rv(i32 %s0, <512 x i32> %i1, <512
2727
; CHECK-NEXT: and %s1, %s1, (32)0
2828
; CHECK-NEXT: srl %s1, %s1, 1
2929
; CHECK-NEXT: lvl %s1
30-
; CHECK-NEXT: pvsubu %v0, %s0, %v0, %vm2
30+
; CHECK-NEXT: pvsubu %v0, %s0, %v0
3131
; CHECK-NEXT: b.l.t (, %s10)
3232
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3333
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -49,7 +49,7 @@ define fastcc <512 x i32> @test_vp_sub_v512i32_vr(<512 x i32> %i0, i32 %s1, <512
4949
; CHECK-NEXT: and %s0, %s0, (32)0
5050
; CHECK-NEXT: srl %s0, %s0, 1
5151
; CHECK-NEXT: lvl %s0
52-
; CHECK-NEXT: pvsubu %v0, %v0, %v1, %vm2
52+
; CHECK-NEXT: pvsubu %v0, %v0, %v1
5353
; CHECK-NEXT: b.l.t (, %s10)
5454
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5555
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

‎llvm/test/CodeGen/VE/Packed/vp_xor.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define fastcc <512 x i32> @test_vp_xor_v512i32_vv(<512 x i32> %i0, <512 x i32> %
1010
; CHECK-NEXT: and %s0, %s0, (32)0
1111
; CHECK-NEXT: srl %s0, %s0, 1
1212
; CHECK-NEXT: lvl %s0
13-
; CHECK-NEXT: pvxor %v0, %v0, %v1, %vm2
13+
; CHECK-NEXT: pvxor %v0, %v0, %v1
1414
; CHECK-NEXT: b.l.t (, %s10)
1515
%r0 = call <512 x i32> @llvm.vp.xor.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)
1616
ret <512 x i32> %r0
@@ -27,7 +27,7 @@ define fastcc <512 x i32> @test_vp_xor_v512i32_rv(i32 %s0, <512 x i32> %i1, <512
2727
; CHECK-NEXT: and %s1, %s1, (32)0
2828
; CHECK-NEXT: srl %s1, %s1, 1
2929
; CHECK-NEXT: lvl %s1
30-
; CHECK-NEXT: pvxor %v0, %s0, %v0, %vm2
30+
; CHECK-NEXT: pvxor %v0, %s0, %v0
3131
; CHECK-NEXT: b.l.t (, %s10)
3232
%xins = insertelement <512 x i32> undef, i32 %s0, i32 0
3333
%i0 = shufflevector <512 x i32> %xins, <512 x i32> undef, <512 x i32> zeroinitializer
@@ -46,7 +46,7 @@ define fastcc <512 x i32> @test_vp_xor_v512i32_vr(<512 x i32> %i0, i32 %s1, <512
4646
; CHECK-NEXT: and %s1, %s1, (32)0
4747
; CHECK-NEXT: srl %s1, %s1, 1
4848
; CHECK-NEXT: lvl %s1
49-
; CHECK-NEXT: pvxor %v0, %s0, %v0, %vm2
49+
; CHECK-NEXT: pvxor %v0, %s0, %v0
5050
; CHECK-NEXT: b.l.t (, %s10)
5151
%yins = insertelement <512 x i32> undef, i32 %s1, i32 0
5252
%i1 = shufflevector <512 x i32> %yins, <512 x i32> undef, <512 x i32> zeroinitializer

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