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[RISCV] Match VF variants for masked VFRDIV/VFRSUB
This patch follows up on D117697 to help the simple binary operations behave similarly in the presence of masks. It also enables CGP sinking support for vp.fdiv and vp.fsub intrinsics, now that VFRDIV and VFRSUB are consistently matched with a LHS splat for masked and unmasked variants. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D117783
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+46
-91
lines changed

5 files changed

+46
-91
lines changed

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1272,9 +1272,7 @@ bool RISCVTargetLowering::shouldSinkOperands(
12721272
case Intrinsic::vp_or:
12731273
case Intrinsic::vp_xor:
12741274
case Intrinsic::vp_fadd:
1275-
case Intrinsic::vp_fsub:
12761275
case Intrinsic::vp_fmul:
1277-
case Intrinsic::vp_fdiv:
12781276
case Intrinsic::vp_shl:
12791277
case Intrinsic::vp_lshr:
12801278
case Intrinsic::vp_ashr:
@@ -1283,9 +1281,11 @@ bool RISCVTargetLowering::shouldSinkOperands(
12831281
case Intrinsic::vp_urem:
12841282
case Intrinsic::vp_srem:
12851283
return Operand == 1;
1286-
// ... the one exception is vp.sub which has explicit patterns for both
1287-
// LHS and RHS (as vrsub).
1284+
// ... with the exception of vp.sub/vp.fsub/vp.fdiv, which have
1285+
// explicit patterns for both LHS and RHS (as 'vr' versions).
12881286
case Intrinsic::vp_sub:
1287+
case Intrinsic::vp_fsub:
1288+
case Intrinsic::vp_fdiv:
12891289
return Operand == 0 || Operand == 1;
12901290
default:
12911291
return false;

‎llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -404,14 +404,23 @@ multiclass VPatBinaryFPVL_VV_VF<SDNode vop, string instruction_name> {
404404
}
405405

406406
multiclass VPatBinaryFPVL_R_VF<SDNode vop, string instruction_name> {
407-
foreach fvti = AllFloatVectors in
407+
foreach fvti = AllFloatVectors in {
408408
def : Pat<(fvti.Vector (vop (SplatFPOp fvti.ScalarRegClass:$rs2),
409409
fvti.RegClass:$rs1,
410410
(fvti.Mask true_mask),
411411
VLOpFrag)),
412412
(!cast<Instruction>(instruction_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX)
413413
fvti.RegClass:$rs1, fvti.ScalarRegClass:$rs2,
414414
GPR:$vl, fvti.Log2SEW)>;
415+
def : Pat<(fvti.Vector (vop (SplatFPOp fvti.ScalarRegClass:$rs2),
416+
fvti.RegClass:$rs1,
417+
(fvti.Mask V0),
418+
VLOpFrag)),
419+
(!cast<Instruction>(instruction_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX#"_MASK")
420+
(fvti.Vector (IMPLICIT_DEF)),
421+
fvti.RegClass:$rs1, fvti.ScalarRegClass:$rs2,
422+
(fvti.Mask V0), GPR:$vl, fvti.Log2SEW, TAIL_AGNOSTIC)>;
423+
}
415424
}
416425

417426
multiclass VPatIntegerSetCCVL_VV<VTypeInfo vti, string instruction_name,

‎llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll

Lines changed: 12 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,8 @@ declare <2 x half> @llvm.vp.fdiv.v2f16(<2 x half>, <2 x half>, <2 x i1>, i32)
99
define <2 x half> @vfrdiv_vf_v2f16(<2 x half> %va, half %b, <2 x i1> %m, i32 zeroext %evl) {
1010
; CHECK-LABEL: vfrdiv_vf_v2f16:
1111
; CHECK: # %bb.0:
12-
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
13-
; CHECK-NEXT: vfmv.v.f v9, fa0
1412
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, mu
15-
; CHECK-NEXT: vfdiv.vv v8, v9, v8, v0.t
13+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
1614
; CHECK-NEXT: ret
1715
%elt.head = insertelement <2 x half> undef, half %b, i32 0
1816
%vb = shufflevector <2 x half> %elt.head, <2 x half> undef, <2 x i32> zeroinitializer
@@ -39,10 +37,8 @@ declare <4 x half> @llvm.vp.fdiv.v4f16(<4 x half>, <4 x half>, <4 x i1>, i32)
3937
define <4 x half> @vfrdiv_vf_v4f16(<4 x half> %va, half %b, <4 x i1> %m, i32 zeroext %evl) {
4038
; CHECK-LABEL: vfrdiv_vf_v4f16:
4139
; CHECK: # %bb.0:
42-
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu
43-
; CHECK-NEXT: vfmv.v.f v9, fa0
4440
; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, mu
45-
; CHECK-NEXT: vfdiv.vv v8, v9, v8, v0.t
41+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
4642
; CHECK-NEXT: ret
4743
%elt.head = insertelement <4 x half> undef, half %b, i32 0
4844
%vb = shufflevector <4 x half> %elt.head, <4 x half> undef, <4 x i32> zeroinitializer
@@ -69,10 +65,8 @@ declare <8 x half> @llvm.vp.fdiv.v8f16(<8 x half>, <8 x half>, <8 x i1>, i32)
6965
define <8 x half> @vfrdiv_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) {
7066
; CHECK-LABEL: vfrdiv_vf_v8f16:
7167
; CHECK: # %bb.0:
72-
; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu
73-
; CHECK-NEXT: vfmv.v.f v9, fa0
7468
; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, mu
75-
; CHECK-NEXT: vfdiv.vv v8, v9, v8, v0.t
69+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
7670
; CHECK-NEXT: ret
7771
%elt.head = insertelement <8 x half> undef, half %b, i32 0
7872
%vb = shufflevector <8 x half> %elt.head, <8 x half> undef, <8 x i32> zeroinitializer
@@ -99,10 +93,8 @@ declare <16 x half> @llvm.vp.fdiv.v16f16(<16 x half>, <16 x half>, <16 x i1>, i3
9993
define <16 x half> @vfrdiv_vf_v16f16(<16 x half> %va, half %b, <16 x i1> %m, i32 zeroext %evl) {
10094
; CHECK-LABEL: vfrdiv_vf_v16f16:
10195
; CHECK: # %bb.0:
102-
; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, mu
103-
; CHECK-NEXT: vfmv.v.f v10, fa0
10496
; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, mu
105-
; CHECK-NEXT: vfdiv.vv v8, v10, v8, v0.t
97+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
10698
; CHECK-NEXT: ret
10799
%elt.head = insertelement <16 x half> undef, half %b, i32 0
108100
%vb = shufflevector <16 x half> %elt.head, <16 x half> undef, <16 x i32> zeroinitializer
@@ -129,10 +121,8 @@ declare <2 x float> @llvm.vp.fdiv.v2f32(<2 x float>, <2 x float>, <2 x i1>, i32)
129121
define <2 x float> @vfrdiv_vf_v2f32(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
130122
; CHECK-LABEL: vfrdiv_vf_v2f32:
131123
; CHECK: # %bb.0:
132-
; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
133-
; CHECK-NEXT: vfmv.v.f v9, fa0
134124
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, mu
135-
; CHECK-NEXT: vfdiv.vv v8, v9, v8, v0.t
125+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
136126
; CHECK-NEXT: ret
137127
%elt.head = insertelement <2 x float> undef, float %b, i32 0
138128
%vb = shufflevector <2 x float> %elt.head, <2 x float> undef, <2 x i32> zeroinitializer
@@ -159,10 +149,8 @@ declare <4 x float> @llvm.vp.fdiv.v4f32(<4 x float>, <4 x float>, <4 x i1>, i32)
159149
define <4 x float> @vfrdiv_vf_v4f32(<4 x float> %va, float %b, <4 x i1> %m, i32 zeroext %evl) {
160150
; CHECK-LABEL: vfrdiv_vf_v4f32:
161151
; CHECK: # %bb.0:
162-
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu
163-
; CHECK-NEXT: vfmv.v.f v9, fa0
164152
; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, mu
165-
; CHECK-NEXT: vfdiv.vv v8, v9, v8, v0.t
153+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
166154
; CHECK-NEXT: ret
167155
%elt.head = insertelement <4 x float> undef, float %b, i32 0
168156
%vb = shufflevector <4 x float> %elt.head, <4 x float> undef, <4 x i32> zeroinitializer
@@ -189,10 +177,8 @@ declare <8 x float> @llvm.vp.fdiv.v8f32(<8 x float>, <8 x float>, <8 x i1>, i32)
189177
define <8 x float> @vfrdiv_vf_v8f32(<8 x float> %va, float %b, <8 x i1> %m, i32 zeroext %evl) {
190178
; CHECK-LABEL: vfrdiv_vf_v8f32:
191179
; CHECK: # %bb.0:
192-
; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, mu
193-
; CHECK-NEXT: vfmv.v.f v10, fa0
194180
; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, mu
195-
; CHECK-NEXT: vfdiv.vv v8, v10, v8, v0.t
181+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
196182
; CHECK-NEXT: ret
197183
%elt.head = insertelement <8 x float> undef, float %b, i32 0
198184
%vb = shufflevector <8 x float> %elt.head, <8 x float> undef, <8 x i32> zeroinitializer
@@ -219,10 +205,8 @@ declare <16 x float> @llvm.vp.fdiv.v16f32(<16 x float>, <16 x float>, <16 x i1>,
219205
define <16 x float> @vfrdiv_vf_v16f32(<16 x float> %va, float %b, <16 x i1> %m, i32 zeroext %evl) {
220206
; CHECK-LABEL: vfrdiv_vf_v16f32:
221207
; CHECK: # %bb.0:
222-
; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu
223-
; CHECK-NEXT: vfmv.v.f v12, fa0
224208
; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, mu
225-
; CHECK-NEXT: vfdiv.vv v8, v12, v8, v0.t
209+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
226210
; CHECK-NEXT: ret
227211
%elt.head = insertelement <16 x float> undef, float %b, i32 0
228212
%vb = shufflevector <16 x float> %elt.head, <16 x float> undef, <16 x i32> zeroinitializer
@@ -249,10 +233,8 @@ declare <2 x double> @llvm.vp.fdiv.v2f64(<2 x double>, <2 x double>, <2 x i1>, i
249233
define <2 x double> @vfrdiv_vf_v2f64(<2 x double> %va, double %b, <2 x i1> %m, i32 zeroext %evl) {
250234
; CHECK-LABEL: vfrdiv_vf_v2f64:
251235
; CHECK: # %bb.0:
252-
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu
253-
; CHECK-NEXT: vfmv.v.f v9, fa0
254236
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, mu
255-
; CHECK-NEXT: vfdiv.vv v8, v9, v8, v0.t
237+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
256238
; CHECK-NEXT: ret
257239
%elt.head = insertelement <2 x double> undef, double %b, i32 0
258240
%vb = shufflevector <2 x double> %elt.head, <2 x double> undef, <2 x i32> zeroinitializer
@@ -279,10 +261,8 @@ declare <4 x double> @llvm.vp.fdiv.v4f64(<4 x double>, <4 x double>, <4 x i1>, i
279261
define <4 x double> @vfrdiv_vf_v4f64(<4 x double> %va, double %b, <4 x i1> %m, i32 zeroext %evl) {
280262
; CHECK-LABEL: vfrdiv_vf_v4f64:
281263
; CHECK: # %bb.0:
282-
; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, mu
283-
; CHECK-NEXT: vfmv.v.f v10, fa0
284264
; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, mu
285-
; CHECK-NEXT: vfdiv.vv v8, v10, v8, v0.t
265+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
286266
; CHECK-NEXT: ret
287267
%elt.head = insertelement <4 x double> undef, double %b, i32 0
288268
%vb = shufflevector <4 x double> %elt.head, <4 x double> undef, <4 x i32> zeroinitializer
@@ -309,10 +289,8 @@ declare <8 x double> @llvm.vp.fdiv.v8f64(<8 x double>, <8 x double>, <8 x i1>, i
309289
define <8 x double> @vfrdiv_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) {
310290
; CHECK-LABEL: vfrdiv_vf_v8f64:
311291
; CHECK: # %bb.0:
312-
; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu
313-
; CHECK-NEXT: vfmv.v.f v12, fa0
314292
; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, mu
315-
; CHECK-NEXT: vfdiv.vv v8, v12, v8, v0.t
293+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
316294
; CHECK-NEXT: ret
317295
%elt.head = insertelement <8 x double> undef, double %b, i32 0
318296
%vb = shufflevector <8 x double> %elt.head, <8 x double> undef, <8 x i32> zeroinitializer
@@ -339,10 +317,8 @@ declare <16 x double> @llvm.vp.fdiv.v16f64(<16 x double>, <16 x double>, <16 x i
339317
define <16 x double> @vfrdiv_vf_v16f64(<16 x double> %va, double %b, <16 x i1> %m, i32 zeroext %evl) {
340318
; CHECK-LABEL: vfrdiv_vf_v16f64:
341319
; CHECK: # %bb.0:
342-
; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, mu
343-
; CHECK-NEXT: vfmv.v.f v16, fa0
344320
; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, mu
345-
; CHECK-NEXT: vfdiv.vv v8, v16, v8, v0.t
321+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
346322
; CHECK-NEXT: ret
347323
%elt.head = insertelement <16 x double> undef, double %b, i32 0
348324
%vb = shufflevector <16 x double> %elt.head, <16 x double> undef, <16 x i32> zeroinitializer

‎llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll

Lines changed: 12 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,8 @@ declare <2 x half> @llvm.vp.fsub.v2f16(<2 x half>, <2 x half>, <2 x i1>, i32)
99
define <2 x half> @vfrsub_vf_v2f16(<2 x half> %va, half %b, <2 x i1> %m, i32 zeroext %evl) {
1010
; CHECK-LABEL: vfrsub_vf_v2f16:
1111
; CHECK: # %bb.0:
12-
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
13-
; CHECK-NEXT: vfmv.v.f v9, fa0
1412
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, mu
15-
; CHECK-NEXT: vfsub.vv v8, v9, v8, v0.t
13+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
1614
; CHECK-NEXT: ret
1715
%elt.head = insertelement <2 x half> undef, half %b, i32 0
1816
%vb = shufflevector <2 x half> %elt.head, <2 x half> undef, <2 x i32> zeroinitializer
@@ -39,10 +37,8 @@ declare <4 x half> @llvm.vp.fsub.v4f16(<4 x half>, <4 x half>, <4 x i1>, i32)
3937
define <4 x half> @vfrsub_vf_v4f16(<4 x half> %va, half %b, <4 x i1> %m, i32 zeroext %evl) {
4038
; CHECK-LABEL: vfrsub_vf_v4f16:
4139
; CHECK: # %bb.0:
42-
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu
43-
; CHECK-NEXT: vfmv.v.f v9, fa0
4440
; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, mu
45-
; CHECK-NEXT: vfsub.vv v8, v9, v8, v0.t
41+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
4642
; CHECK-NEXT: ret
4743
%elt.head = insertelement <4 x half> undef, half %b, i32 0
4844
%vb = shufflevector <4 x half> %elt.head, <4 x half> undef, <4 x i32> zeroinitializer
@@ -69,10 +65,8 @@ declare <8 x half> @llvm.vp.fsub.v8f16(<8 x half>, <8 x half>, <8 x i1>, i32)
6965
define <8 x half> @vfrsub_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) {
7066
; CHECK-LABEL: vfrsub_vf_v8f16:
7167
; CHECK: # %bb.0:
72-
; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu
73-
; CHECK-NEXT: vfmv.v.f v9, fa0
7468
; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, mu
75-
; CHECK-NEXT: vfsub.vv v8, v9, v8, v0.t
69+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
7670
; CHECK-NEXT: ret
7771
%elt.head = insertelement <8 x half> undef, half %b, i32 0
7872
%vb = shufflevector <8 x half> %elt.head, <8 x half> undef, <8 x i32> zeroinitializer
@@ -99,10 +93,8 @@ declare <16 x half> @llvm.vp.fsub.v16f16(<16 x half>, <16 x half>, <16 x i1>, i3
9993
define <16 x half> @vfrsub_vf_v16f16(<16 x half> %va, half %b, <16 x i1> %m, i32 zeroext %evl) {
10094
; CHECK-LABEL: vfrsub_vf_v16f16:
10195
; CHECK: # %bb.0:
102-
; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, mu
103-
; CHECK-NEXT: vfmv.v.f v10, fa0
10496
; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, mu
105-
; CHECK-NEXT: vfsub.vv v8, v10, v8, v0.t
97+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
10698
; CHECK-NEXT: ret
10799
%elt.head = insertelement <16 x half> undef, half %b, i32 0
108100
%vb = shufflevector <16 x half> %elt.head, <16 x half> undef, <16 x i32> zeroinitializer
@@ -129,10 +121,8 @@ declare <2 x float> @llvm.vp.fsub.v2f32(<2 x float>, <2 x float>, <2 x i1>, i32)
129121
define <2 x float> @vfrsub_vf_v2f32(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
130122
; CHECK-LABEL: vfrsub_vf_v2f32:
131123
; CHECK: # %bb.0:
132-
; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
133-
; CHECK-NEXT: vfmv.v.f v9, fa0
134124
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, mu
135-
; CHECK-NEXT: vfsub.vv v8, v9, v8, v0.t
125+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
136126
; CHECK-NEXT: ret
137127
%elt.head = insertelement <2 x float> undef, float %b, i32 0
138128
%vb = shufflevector <2 x float> %elt.head, <2 x float> undef, <2 x i32> zeroinitializer
@@ -159,10 +149,8 @@ declare <4 x float> @llvm.vp.fsub.v4f32(<4 x float>, <4 x float>, <4 x i1>, i32)
159149
define <4 x float> @vfrsub_vf_v4f32(<4 x float> %va, float %b, <4 x i1> %m, i32 zeroext %evl) {
160150
; CHECK-LABEL: vfrsub_vf_v4f32:
161151
; CHECK: # %bb.0:
162-
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu
163-
; CHECK-NEXT: vfmv.v.f v9, fa0
164152
; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, mu
165-
; CHECK-NEXT: vfsub.vv v8, v9, v8, v0.t
153+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
166154
; CHECK-NEXT: ret
167155
%elt.head = insertelement <4 x float> undef, float %b, i32 0
168156
%vb = shufflevector <4 x float> %elt.head, <4 x float> undef, <4 x i32> zeroinitializer
@@ -189,10 +177,8 @@ declare <8 x float> @llvm.vp.fsub.v8f32(<8 x float>, <8 x float>, <8 x i1>, i32)
189177
define <8 x float> @vfrsub_vf_v8f32(<8 x float> %va, float %b, <8 x i1> %m, i32 zeroext %evl) {
190178
; CHECK-LABEL: vfrsub_vf_v8f32:
191179
; CHECK: # %bb.0:
192-
; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, mu
193-
; CHECK-NEXT: vfmv.v.f v10, fa0
194180
; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, mu
195-
; CHECK-NEXT: vfsub.vv v8, v10, v8, v0.t
181+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
196182
; CHECK-NEXT: ret
197183
%elt.head = insertelement <8 x float> undef, float %b, i32 0
198184
%vb = shufflevector <8 x float> %elt.head, <8 x float> undef, <8 x i32> zeroinitializer
@@ -219,10 +205,8 @@ declare <16 x float> @llvm.vp.fsub.v16f32(<16 x float>, <16 x float>, <16 x i1>,
219205
define <16 x float> @vfrsub_vf_v16f32(<16 x float> %va, float %b, <16 x i1> %m, i32 zeroext %evl) {
220206
; CHECK-LABEL: vfrsub_vf_v16f32:
221207
; CHECK: # %bb.0:
222-
; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, mu
223-
; CHECK-NEXT: vfmv.v.f v12, fa0
224208
; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, mu
225-
; CHECK-NEXT: vfsub.vv v8, v12, v8, v0.t
209+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
226210
; CHECK-NEXT: ret
227211
%elt.head = insertelement <16 x float> undef, float %b, i32 0
228212
%vb = shufflevector <16 x float> %elt.head, <16 x float> undef, <16 x i32> zeroinitializer
@@ -249,10 +233,8 @@ declare <2 x double> @llvm.vp.fsub.v2f64(<2 x double>, <2 x double>, <2 x i1>, i
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define <2 x double> @vfrsub_vf_v2f64(<2 x double> %va, double %b, <2 x i1> %m, i32 zeroext %evl) {
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; CHECK-LABEL: vfrsub_vf_v2f64:
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; CHECK: # %bb.0:
252-
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu
253-
; CHECK-NEXT: vfmv.v.f v9, fa0
254236
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, mu
255-
; CHECK-NEXT: vfsub.vv v8, v9, v8, v0.t
237+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
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; CHECK-NEXT: ret
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%elt.head = insertelement <2 x double> undef, double %b, i32 0
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%vb = shufflevector <2 x double> %elt.head, <2 x double> undef, <2 x i32> zeroinitializer
@@ -279,10 +261,8 @@ declare <4 x double> @llvm.vp.fsub.v4f64(<4 x double>, <4 x double>, <4 x i1>, i
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define <4 x double> @vfrsub_vf_v4f64(<4 x double> %va, double %b, <4 x i1> %m, i32 zeroext %evl) {
280262
; CHECK-LABEL: vfrsub_vf_v4f64:
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; CHECK: # %bb.0:
282-
; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, mu
283-
; CHECK-NEXT: vfmv.v.f v10, fa0
284264
; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, mu
285-
; CHECK-NEXT: vfsub.vv v8, v10, v8, v0.t
265+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
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; CHECK-NEXT: ret
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%elt.head = insertelement <4 x double> undef, double %b, i32 0
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%vb = shufflevector <4 x double> %elt.head, <4 x double> undef, <4 x i32> zeroinitializer
@@ -309,10 +289,8 @@ declare <8 x double> @llvm.vp.fsub.v8f64(<8 x double>, <8 x double>, <8 x i1>, i
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define <8 x double> @vfrsub_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) {
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; CHECK-LABEL: vfrsub_vf_v8f64:
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; CHECK: # %bb.0:
312-
; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu
313-
; CHECK-NEXT: vfmv.v.f v12, fa0
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; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, mu
315-
; CHECK-NEXT: vfsub.vv v8, v12, v8, v0.t
293+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
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; CHECK-NEXT: ret
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%elt.head = insertelement <8 x double> undef, double %b, i32 0
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%vb = shufflevector <8 x double> %elt.head, <8 x double> undef, <8 x i32> zeroinitializer
@@ -339,10 +317,8 @@ declare <16 x double> @llvm.vp.fsub.v16f64(<16 x double>, <16 x double>, <16 x i
339317
define <16 x double> @vfrsub_vf_v16f64(<16 x double> %va, double %b, <16 x i1> %m, i32 zeroext %evl) {
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; CHECK-LABEL: vfrsub_vf_v16f64:
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; CHECK: # %bb.0:
342-
; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, mu
343-
; CHECK-NEXT: vfmv.v.f v16, fa0
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; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, mu
345-
; CHECK-NEXT: vfsub.vv v8, v16, v8, v0.t
321+
; CHECK-NEXT: vfrsub.vf v8, v8, fa0, v0.t
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; CHECK-NEXT: ret
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%elt.head = insertelement <16 x double> undef, double %b, i32 0
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%vb = shufflevector <16 x double> %elt.head, <16 x double> undef, <16 x i32> zeroinitializer

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