@@ -4100,15 +4100,13 @@ def : Pat<(f64 (bitconvert VK64:$src)),
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multiclass avx512_move_scalar<string asm, SDNode OpNode, PatFrag vzload_frag,
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X86VectorVTInfo _,
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- list<Predicate> prd = [HasAVX512],
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- list<Predicate> prdsize = [HasAVX512, OptForSize]> {
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- let Predicates = prdsize in
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+ list<Predicate> prd = [HasAVX512, OptForSize]> {
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+ let Predicates = prd in
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def rr : AVX512PI<0x10, MRMSrcReg, (outs _.RC:$dst),
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(ins _.RC:$src1, _.RC:$src2),
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!strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set _.RC:$dst, (_.VT (OpNode _.RC:$src1, _.RC:$src2)))],
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_.ExeDomain>, EVEX_4V, Sched<[SchedWriteFShuffle.XMM]>;
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- let Predicates = prd in {
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def rrkz : AVX512PI<0x10, MRMSrcReg, (outs _.RC:$dst),
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(ins _.KRCWM:$mask, _.RC:$src1, _.RC:$src2),
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!strconcat(asm, "\t{$src2, $src1, $dst {${mask}} {z}|",
@@ -4161,7 +4159,6 @@ multiclass avx512_move_scalar<string asm, SDNode OpNode, PatFrag vzload_frag,
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!strconcat(asm, "\t{$src, $dst {${mask}}|$dst {${mask}}, $src}"),
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[], _.ExeDomain>, EVEX, EVEX_K, Sched<[WriteFStore]>,
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NotMemoryFoldable;
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- } // Predicates
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}
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defm VMOVSSZ : avx512_move_scalar<"vmovss", X86Movss, X86vzload32, f32x_info>,
@@ -4171,7 +4168,7 @@ defm VMOVSDZ : avx512_move_scalar<"vmovsd", X86Movsd, X86vzload64, f64x_info>,
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VEX_LIG, XD, VEX_W, EVEX_CD8<64, CD8VT1>;
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defm VMOVSHZ : avx512_move_scalar<"vmovsh", X86Movsh, X86vzload16, f16x_info,
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- [HasFP16], [HasFP16] >,
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+ [HasFP16]>,
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VEX_LIG, T_MAP5XS, EVEX_CD8<16, CD8VT1>;
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multiclass avx512_move_scalar_lowering<string InstrStr, SDNode OpNode,
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