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[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
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‎llvm/include/llvm/CodeGen/MachineInstr.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1746,7 +1746,7 @@ class MachineInstr
17461746

17471747
/// Erase an operand from an instruction, leaving it with one
17481748
/// fewer operand than it started with.
1749-
void RemoveOperand(unsigned OpNo);
1749+
void removeOperand(unsigned OpNo);
17501750

17511751
/// Clear this MachineInstr's memory reference descriptor list. This resets
17521752
/// the memrefs to their most conservative state. This should be used only
@@ -1865,12 +1865,12 @@ class MachineInstr
18651865
/// Unlink all of the register operands in this instruction from their
18661866
/// respective use lists. This requires that the operands already be on their
18671867
/// use lists.
1868-
void RemoveRegOperandsFromUseLists(MachineRegisterInfo&);
1868+
void removeRegOperandsFromUseLists(MachineRegisterInfo&);
18691869

18701870
/// Add all of the register operands in this instruction from their
18711871
/// respective use lists. This requires that the operands not be on their
18721872
/// use lists yet.
1873-
void AddRegOperandsToUseLists(MachineRegisterInfo&);
1873+
void addRegOperandsToUseLists(MachineRegisterInfo&);
18741874

18751875
/// Slow path for hasProperty when we're dealing with a bundle.
18761876
bool hasPropertyInBundle(uint64_t Mask, QueryType Type) const;

‎llvm/lib/CodeGen/EarlyIfConversion.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -663,8 +663,8 @@ void SSAIfConv::rewritePHIOperands() {
663663
PI.PHI->getOperand(i-1).setMBB(Head);
664664
PI.PHI->getOperand(i-2).setReg(DstReg);
665665
} else if (MBB == getFPred()) {
666-
PI.PHI->RemoveOperand(i-1);
667-
PI.PHI->RemoveOperand(i-2);
666+
PI.PHI->removeOperand(i-1);
667+
PI.PHI->removeOperand(i-2);
668668
}
669669
}
670670
LLVM_DEBUG(dbgs() << " --> " << *PI.PHI);

‎llvm/lib/CodeGen/ExpandPostRAPseudos.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,8 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
102102

103103
if (MI->allDefsAreDead()) {
104104
MI->setDesc(TII->get(TargetOpcode::KILL));
105-
MI->RemoveOperand(3); // SubIdx
106-
MI->RemoveOperand(1); // Imm
105+
MI->removeOperand(3); // SubIdx
106+
MI->removeOperand(1); // Imm
107107
LLVM_DEBUG(dbgs() << "subreg: replaced by: " << *MI);
108108
return true;
109109
}
@@ -115,8 +115,8 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
115115
// We must leave %rax live.
116116
if (DstReg != InsReg) {
117117
MI->setDesc(TII->get(TargetOpcode::KILL));
118-
MI->RemoveOperand(3); // SubIdx
119-
MI->RemoveOperand(1); // Imm
118+
MI->removeOperand(3); // SubIdx
119+
MI->removeOperand(1); // Imm
120120
LLVM_DEBUG(dbgs() << "subreg: replace by: " << *MI);
121121
return true;
122122
}

‎llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4083,7 +4083,7 @@ void CombinerHelper::applyFunnelShiftToRotate(MachineInstr &MI) {
40834083
Observer.changingInstr(MI);
40844084
MI.setDesc(Builder.getTII().get(IsFSHL ? TargetOpcode::G_ROTL
40854085
: TargetOpcode::G_ROTR));
4086-
MI.RemoveOperand(2);
4086+
MI.removeOperand(2);
40874087
Observer.changedInstr(MI);
40884088
}
40894089

‎llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3317,7 +3317,7 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
33173317
Observer.changingInstr(MI);
33183318
const auto &TII = MIRBuilder.getTII();
33193319
MI.setDesc(TII.get(TargetOpcode::G_MUL));
3320-
MI.RemoveOperand(1);
3320+
MI.removeOperand(1);
33213321
Observer.changedInstr(MI);
33223322

33233323
auto HiPart = MIRBuilder.buildInstr(Opcode, {Ty}, {LHS, RHS});

‎llvm/lib/CodeGen/InlineSpiller.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -963,7 +963,7 @@ foldMemoryOperand(ArrayRef<std::pair<MachineInstr *, unsigned>> Ops,
963963
if (!MO.isReg() || !MO.isImplicit())
964964
break;
965965
if (MO.getReg() == ImpReg)
966-
FoldMI->RemoveOperand(i - 1);
966+
FoldMI->removeOperand(i - 1);
967967
}
968968

969969
LLVM_DEBUG(dumpMachineInstrRangeWithSlotIndex(MIS.begin(), MIS.end(), LIS,
@@ -1607,7 +1607,7 @@ void HoistSpillHelper::hoistAllSpills() {
16071607
for (unsigned i = RMEnt->getNumOperands(); i; --i) {
16081608
MachineOperand &MO = RMEnt->getOperand(i - 1);
16091609
if (MO.isReg() && MO.isImplicit() && MO.isDef() && !MO.isDead())
1610-
RMEnt->RemoveOperand(i - 1);
1610+
RMEnt->removeOperand(i - 1);
16111611
}
16121612
}
16131613
Edit.eliminateDeadDefs(SpillsToRm, None, AA);

‎llvm/lib/CodeGen/LiveRangeEdit.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -371,7 +371,7 @@ void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
371371
const MachineOperand &MO = MI->getOperand(i-1);
372372
if (MO.isReg() && Register::isPhysicalRegister(MO.getReg()))
373373
continue;
374-
MI->RemoveOperand(i-1);
374+
MI->removeOperand(i-1);
375375
}
376376
LLVM_DEBUG(dbgs() << "Converted physregs to:\t" << *MI);
377377
} else {

‎llvm/lib/CodeGen/MachineBasicBlock.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,7 @@ void ilist_callback_traits<MachineBasicBlock>::addNodeToList(
132132
// Make sure the instructions have their operands in the reginfo lists.
133133
MachineRegisterInfo &RegInfo = MF.getRegInfo();
134134
for (MachineInstr &MI : N->instrs())
135-
MI.AddRegOperandsToUseLists(RegInfo);
135+
MI.addRegOperandsToUseLists(RegInfo);
136136
}
137137

138138
void ilist_callback_traits<MachineBasicBlock>::removeNodeFromList(
@@ -150,7 +150,7 @@ void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
150150
// Add the instruction's register operands to their corresponding
151151
// use/def lists.
152152
MachineFunction *MF = Parent->getParent();
153-
N->AddRegOperandsToUseLists(MF->getRegInfo());
153+
N->addRegOperandsToUseLists(MF->getRegInfo());
154154
MF->handleInsertion(*N);
155155
}
156156

@@ -162,7 +162,7 @@ void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
162162
// Remove from the use/def lists.
163163
if (MachineFunction *MF = N->getMF()) {
164164
MF->handleRemoval(*N);
165-
N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
165+
N->removeRegOperandsFromUseLists(MF->getRegInfo());
166166
}
167167

168168
N->setParent(nullptr);

‎llvm/lib/CodeGen/MachineInstr.cpp

Lines changed: 5 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -146,19 +146,13 @@ MachineRegisterInfo *MachineInstr::getRegInfo() {
146146
return nullptr;
147147
}
148148

149-
/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
150-
/// this instruction from their respective use lists. This requires that the
151-
/// operands already be on their use lists.
152-
void MachineInstr::RemoveRegOperandsFromUseLists(MachineRegisterInfo &MRI) {
149+
void MachineInstr::removeRegOperandsFromUseLists(MachineRegisterInfo &MRI) {
153150
for (MachineOperand &MO : operands())
154151
if (MO.isReg())
155152
MRI.removeRegOperandFromUseList(&MO);
156153
}
157154

158-
/// AddRegOperandsToUseLists - Add all of the register operands in
159-
/// this instruction from their respective use lists. This requires that the
160-
/// operands not be on their use lists yet.
161-
void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &MRI) {
155+
void MachineInstr::addRegOperandsToUseLists(MachineRegisterInfo &MRI) {
162156
for (MachineOperand &MO : operands())
163157
if (MO.isReg())
164158
MRI.addRegOperandToUseList(&MO);
@@ -279,10 +273,7 @@ void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) {
279273
}
280274
}
281275

282-
/// RemoveOperand - Erase an operand from an instruction, leaving it with one
283-
/// fewer operand than it started with.
284-
///
285-
void MachineInstr::RemoveOperand(unsigned OpNo) {
276+
void MachineInstr::removeOperand(unsigned OpNo) {
286277
assert(OpNo < getNumOperands() && "Invalid operand number");
287278
untieRegOperand(OpNo);
288279

@@ -1883,7 +1874,7 @@ bool MachineInstr::addRegisterKilled(Register IncomingReg,
18831874
unsigned OpIdx = DeadOps.back();
18841875
if (getOperand(OpIdx).isImplicit() &&
18851876
(!isInlineAsm() || findInlineAsmFlagIdx(OpIdx) < 0))
1886-
RemoveOperand(OpIdx);
1877+
removeOperand(OpIdx);
18871878
else
18881879
getOperand(OpIdx).setIsKill(false);
18891880
DeadOps.pop_back();
@@ -1948,7 +1939,7 @@ bool MachineInstr::addRegisterDead(Register Reg,
19481939
unsigned OpIdx = DeadOps.back();
19491940
if (getOperand(OpIdx).isImplicit() &&
19501941
(!isInlineAsm() || findInlineAsmFlagIdx(OpIdx) < 0))
1951-
RemoveOperand(OpIdx);
1942+
removeOperand(OpIdx);
19521943
else
19531944
getOperand(OpIdx).setIsDead(false);
19541945
DeadOps.pop_back();

‎llvm/lib/CodeGen/MachineLoopUtils.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -89,15 +89,15 @@ MachineBasicBlock *llvm::PeelSingleBlockLoop(LoopPeelDirection Direction,
8989
if (Remaps.count(R))
9090
R = Remaps[R];
9191
OrigPhi.getOperand(InitRegIdx).setReg(R);
92-
MI.RemoveOperand(LoopRegIdx + 1);
93-
MI.RemoveOperand(LoopRegIdx + 0);
92+
MI.removeOperand(LoopRegIdx + 1);
93+
MI.removeOperand(LoopRegIdx + 0);
9494
} else {
9595
// When peeling back, the initial value is the loop-carried value from
9696
// the original loop.
9797
Register LoopReg = OrigPhi.getOperand(LoopRegIdx).getReg();
9898
MI.getOperand(LoopRegIdx).setReg(LoopReg);
99-
MI.RemoveOperand(InitRegIdx + 1);
100-
MI.RemoveOperand(InitRegIdx + 0);
99+
MI.removeOperand(InitRegIdx + 1);
100+
MI.removeOperand(InitRegIdx + 0);
101101
}
102102
}
103103

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