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[WB] Update STM32WBxx HAL Drivers to v1.8.0
Included in STM32CubeWB FW v1.11.0 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent d8f88bd commit eef1fd4

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57 files changed

+2998
-1252
lines changed

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

Lines changed: 70 additions & 99 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -521,8 +521,13 @@ typedef enum
521521
(((__INTERRUPT__) & SYSCFG_IT_FPU_IDC) == SYSCFG_IT_FPU_IDC) || \
522522
(((__INTERRUPT__) & SYSCFG_IT_FPU_IXC) == SYSCFG_IT_FPU_IXC))
523523

524+
#if defined(STM32WB15xx)
525+
#define IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0xFFFFFFFFU))
526+
#define IS_SYSCFG_SRAM2WRP2_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0x0000000FU))
527+
#else
524528
#define IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0xFFFFFFFFU))
525529
#define IS_SYSCFG_SRAM2WRP2_PAGE(__PAGE__) IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__)
530+
#endif
526531

527532
#if defined(VREFBUF)
528533
#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_adc.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -268,6 +268,7 @@ typedef struct
268268
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
269269
Refer to device datasheet for timings values. */
270270

271+
#if !defined (ADC_SUPPORT_2_5_MSPS)
271272
uint32_t SingleDiff; /*!< Select single-ended or differential input.
272273
In differential mode: Differential measurement is carried out between the selected channel 'i' (positive input) and channel 'i+1' (negative input).
273274
Only channel 'i' has to be configured, channel 'i+1' is configured automatically.
@@ -291,6 +292,7 @@ typedef struct
291292
Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled
292293
without continuous mode or external trigger that could launch a conversion). */
293294

295+
#endif
294296
} ADC_ChannelConfTypeDef;
295297

296298
/**

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_comp.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -181,7 +181,11 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
181181
/** @defgroup COMP_InputPlus COMP input plus (non-inverting input)
182182
* @{
183183
*/
184+
#if defined(STM32WB15xx) || defined(STM32WB10xx)
185+
/* COMP_INPUT_PLUS_IO1 not available on this device */
186+
#else
184187
#define COMP_INPUT_PLUS_IO1 (0x00000000UL) /*!< Comparator input plus connected to IO1 (pin PC5 for COMP1 (except device STM32WB35xx), pin PB4 for COMP2). Note: On STM32WB serie, parameter not available on devices: STM32WB10xx, STM32WB15xx. */
188+
#endif
185189
#define COMP_INPUT_PLUS_IO2 (COMP_CSR_INPSEL_0) /*!< Comparator input plus connected to IO2 (pin PB2 for COMP1, pin PB6 for COMP2) */
186190
#define COMP_INPUT_PLUS_IO3 (COMP_CSR_INPSEL_1) /*!< Comparator input plus connected to IO3 (pin PA1 for COMP1, pin PA3 for COMP2) */
187191
/**
@@ -196,7 +200,11 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
196200
#define COMP_INPUT_MINUS_3_4VREFINT ( COMP_CSR_INMSEL_1 | COMP_CSR_SCALEN | COMP_CSR_BRGEN) /*!< Comparator input minus connected to 3/4 VrefInt */
197201
#define COMP_INPUT_MINUS_VREFINT ( COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0 | COMP_CSR_SCALEN ) /*!< Comparator input minus connected to VrefInt */
198202
#define COMP_INPUT_MINUS_IO1 (COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 ) /*!< Comparator input minus connected to IO1 (pin PB1 for COMP1, pin PB3 for COMP2) */
203+
#if defined(STM32WB15xx) || defined(STM32WB10xx)
204+
/* COMP_INPUT_MINUS_IO2 not available on this device */
205+
#else
199206
#define COMP_INPUT_MINUS_IO2 (COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO2 (pin PC4 for COMP1 (except device STM32WB35xx), pin PB7 for COMP2). Note: On STM32WB serie, parameter not available on devices: STM32WB10xx, STM32WB15xx. */
207+
#endif
200208
#define COMP_INPUT_MINUS_IO3 ( COMP_CSR_INMESEL_0 | COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO3 (pin PA0 for COMP1, pin PA2 for COMP2) */
201209
#define COMP_INPUT_MINUS_IO4 (COMP_CSR_INMESEL_1 | COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO4 (pin PA4 for COMP1, pin PA4 for COMP2) */
202210
#define COMP_INPUT_MINUS_IO5 (COMP_CSR_INMESEL_1 | COMP_CSR_INMESEL_0 | COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO5 (pin PA5 for COMP1, pin PA5 for COMP2) */

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_conf_template.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,8 @@
8787
#define USE_HAL_USART_REGISTER_CALLBACKS 0u
8888
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
8989

90+
#define USE_HAL_CRYP_SUSPEND_RESUME 0u
91+
9092
/* ########################## Oscillator Values adaptation ####################*/
9193
/**
9294
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_def.h

Lines changed: 28 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,9 @@ typedef enum
5454
} HAL_LockTypeDef;
5555

5656
/* Exported macros -----------------------------------------------------------*/
57-
58-
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
57+
#ifndef UNUSED
58+
#define UNUSED(X) (void)(X) /* To avoid gcc/g++ warnings */
59+
#endif
5960

6061
#define HAL_MAX_DELAY 0xFFFFFFFFU
6162

@@ -107,7 +108,15 @@ typedef enum
107108
}while (0)
108109
#endif /* USE_RTOS */
109110

110-
#if defined ( __GNUC__ )
111+
112+
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
113+
#ifndef __weak
114+
#define __weak __attribute__((weak))
115+
#endif
116+
#ifndef __packed
117+
#define __packed __attribute__((packed))
118+
#endif
119+
#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
111120
#ifndef __weak
112121
#define __weak __attribute__((weak))
113122
#endif /* __weak */
@@ -118,8 +127,14 @@ typedef enum
118127

119128

120129
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
121-
/* GNU Compiler */
122-
#if defined (__GNUC__)
130+
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
131+
#ifndef __ALIGN_BEGIN
132+
#define __ALIGN_BEGIN
133+
#endif
134+
#ifndef __ALIGN_END
135+
#define __ALIGN_END __attribute__ ((aligned (4)))
136+
#endif
137+
#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
123138
#ifndef __ALIGN_END
124139
#define __ALIGN_END __attribute__ ((aligned (4)))
125140
#endif /* __ALIGN_END */
@@ -131,11 +146,9 @@ typedef enum
131146
#define __ALIGN_END
132147
#endif /* __ALIGN_END */
133148
#ifndef __ALIGN_BEGIN
134-
/* ARM Compiler */
135-
#if defined (__CC_ARM)
149+
#if defined (__CC_ARM) /* ARM Compiler V5 */
136150
#define __ALIGN_BEGIN __align(4)
137-
/* IAR Compiler */
138-
#elif defined (__ICCARM__)
151+
#elif defined (__ICCARM__) /* IAR Compiler */
139152
#define __ALIGN_BEGIN
140153
#endif /* __CC_ARM */
141154
#endif /* __ALIGN_BEGIN */
@@ -144,9 +157,9 @@ typedef enum
144157
/**
145158
* @brief __RAM_FUNC definition
146159
*/
147-
#if defined ( __CC_ARM )
148-
/* ARM Compiler
149-
------------
160+
#if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
161+
/* ARM Compiler V4/V5 and V6
162+
--------------------------
150163
RAM functions are defined using the toolchain options.
151164
Functions that are executed in RAM should reside in a separate source module.
152165
Using the 'Options for File' dialog you can simply change the 'Code / Const'
@@ -176,9 +189,9 @@ typedef enum
176189
/**
177190
* @brief __NOINLINE definition
178191
*/
179-
#if defined ( __CC_ARM ) || defined ( __GNUC__ )
180-
/* ARM & GNUCompiler
181-
----------------
192+
#if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ )
193+
/* ARM V4/V5 and V6 & GNU Compiler
194+
-------------------------------
182195
*/
183196
#define __NOINLINE __attribute__ ( (noinline) )
184197

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_exti.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -105,7 +105,7 @@ typedef struct
105105
#define EXTI_LINE_17 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | 0x11u)
106106
#define EXTI_LINE_18 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | 0x12u)
107107
#define EXTI_LINE_19 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | 0x13u)
108-
#if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined STM32WB35xx
108+
#if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx) || defined (STM32WB15xx)
109109
#define EXTI_LINE_20 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | 0x14u)
110110
#else
111111
#define EXTI_LINE_20 (EXTI_RESERVED | EXTI_REG1 | 0x14u)
@@ -122,7 +122,7 @@ typedef struct
122122
#define EXTI_LINE_23 (EXTI_RESERVED | EXTI_REG1 | 0x17u)
123123
#endif
124124
#define EXTI_LINE_24 (EXTI_DIRECT | EXTI_REG1 | 0x18u)
125-
#if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined STM32WB35xx
125+
#if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx) || defined (STM32WB15xx)
126126
#define EXTI_LINE_25 (EXTI_DIRECT | EXTI_REG1 | 0x19u)
127127
#else
128128
#define EXTI_LINE_25 (EXTI_RESERVED | EXTI_REG1 | 0x19u)
@@ -136,7 +136,7 @@ typedef struct
136136
#endif
137137
#define EXTI_LINE_29 (EXTI_DIRECT | EXTI_REG1 | 0x1Du)
138138
#define EXTI_LINE_30 (EXTI_DIRECT | EXTI_REG1 | 0x1Eu)
139-
#if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined STM32WB35xx
139+
#if defined (STM32WB55xx) || defined (STM32WB5Mxx) || defined (STM32WB35xx) || defined (STM32WB15xx)
140140
#define EXTI_LINE_31 (EXTI_CONFIG | EXTI_REG1 | 0x1Fu)
141141
#else
142142
#define EXTI_LINE_31 (EXTI_RESERVED | EXTI_REG1 | 0x1Fu)

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_flash.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -565,6 +565,7 @@ typedef struct
565565
#define SRAM2B_START_SECURE_ADDR_1 (SRAM2B_BASE + 0x0400U) /* When in secure mode (SRAM2B_BASE + 0x0400) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
566566
#define SRAM2B_START_SECURE_ADDR_2 (SRAM2B_BASE + 0x0800U) /* When in secure mode (SRAM2B_BASE + 0x0800) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
567567
#define SRAM2B_START_SECURE_ADDR_3 (SRAM2B_BASE + 0x0C00U) /* When in secure mode (SRAM2B_BASE + 0x0C00) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
568+
#if !defined(STM32WB15xx)
568569
#define SRAM2B_START_SECURE_ADDR_4 (SRAM2B_BASE + 0x1000U) /* When in secure mode (SRAM2B_BASE + 0x1000) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
569570
#define SRAM2B_START_SECURE_ADDR_5 (SRAM2B_BASE + 0x1400U) /* When in secure mode (SRAM2B_BASE + 0x1400) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
570571
#define SRAM2B_START_SECURE_ADDR_6 (SRAM2B_BASE + 0x1800U) /* When in secure mode (SRAM2B_BASE + 0x1800) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
@@ -594,6 +595,9 @@ typedef struct
594595
#define SRAM2B_START_SECURE_ADDR_30 (SRAM2B_BASE + 0x7800U) /* When in secure mode (SRAM2B_BASE + 0x7800) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
595596
#define SRAM2B_START_SECURE_ADDR_31 (SRAM2B_BASE + 0x7C00U) /* When in secure mode (SRAM2B_BASE + 0x7C00) -> SRAM2B_END_ADDR is accessible only by M0 Plus */
596597
#define SRAM2B_FULL_UNSECURE (SRAM2B_BASE + 0x8000U) /* The RAM2B is accessible to M0 Plus and M4 */
598+
#else
599+
#define SRAM2B_FULL_UNSECURE (SRAM2B_BASE + 0x0C00U) /* The RAM2B is accessible to M0 Plus and M4 */
600+
#endif
597601

598602
/**
599603
* @}
@@ -852,12 +856,21 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
852856
#define FLASH_END_ADDR (FLASH_BASE + FLASH_SIZE - 1U)
853857

854858
#define FLASH_BANK_SIZE FLASH_SIZE /*!< FLASH Bank Size */
859+
#if defined(STM32WB15xx)
860+
#define FLASH_PAGE_SIZE 0x00000800U /*!< FLASH Page Size, 2 KBytes */
861+
#else
855862
#define FLASH_PAGE_SIZE 0x00001000U /*!< FLASH Page Size, 4 KBytes */
863+
#endif
856864
#define FLASH_PAGE_NB (FLASH_SIZE / FLASH_PAGE_SIZE)
857865
#define FLASH_TIMEOUT_VALUE 1000U /*!< FLASH Execution Timeout, 1 s */
858866

867+
#if defined(STM32WB15xx)
868+
#define FLASH_PCROP_GRANULARITY_OFFSET 10U /*!< FLASH Code Readout Protection granularity offset */
869+
#define FLASH_PCROP_GRANULARITY (1UL << FLASH_PCROP_GRANULARITY_OFFSET) /*!< FLASH Code Readout Protection granularity, 1 KBytes */
870+
#else
859871
#define FLASH_PCROP_GRANULARITY_OFFSET 11U /*!< FLASH Code Readout Protection granularity offset */
860872
#define FLASH_PCROP_GRANULARITY (1UL << FLASH_PCROP_GRANULARITY_OFFSET) /*!< FLASH Code Readout Protection granularity, 2 KBytes */
873+
#endif
861874

862875
#define FLASH_TYPENONE 0x00000000U /*!< No Programmation Procedure On Going */
863876
/**

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_gpio_ex.h

Lines changed: 104 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -521,6 +521,110 @@
521521

522522
#endif
523523

524+
#if defined (STM32WB15xx) || defined (STM32WB10xx)
525+
/**
526+
* @brief AF 0 selection
527+
*/
528+
#define GPIO_AF0_MCO ((uint8_t)0x00) /*!< MCO Alternate Function mapping */
529+
#define GPIO_AF0_LSCO ((uint8_t)0x00) /*!< LSCO Alternate Function mapping */
530+
#define GPIO_AF0_JTMS_SWDIO ((uint8_t)0x00) /*!< JTMS-SWDIO Alternate Function mapping */
531+
#define GPIO_AF0_JTCK_SWCLK ((uint8_t)0x00) /*!< JTCK-SWCLK Alternate Function mapping */
532+
#define GPIO_AF0_JTDI ((uint8_t)0x00) /*!< JTDI Alternate Function mapping */
533+
#define GPIO_AF0_RTC_OUT ((uint8_t)0x00) /*!< RCT_OUT Alternate Function mapping */
534+
#define GPIO_AF0_JTD_TRACE ((uint8_t)0x00) /*!< JTDO-TRACESWO Alternate Function mapping */
535+
#define GPIO_AF0_NJTRST ((uint8_t)0x00) /*!< NJTRST Alternate Function mapping */
536+
537+
/**
538+
* @brief AF 1 selection
539+
*/
540+
#define GPIO_AF1_TIM1 ((uint8_t)0x01) /*!< TIM1 Alternate Function mapping */
541+
#define GPIO_AF1_TIM2 ((uint8_t)0x01) /*!< TIM2 Alternate Function mapping */
542+
#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /*!< LPTIM1 Alternate Function mapping */
543+
544+
/**
545+
* @brief AF 2 selection
546+
*/
547+
#define GPIO_AF2_TIM2 ((uint8_t)0x02) /*!< TIM2 Alternate Function mapping */
548+
#define GPIO_AF2_TIM1 ((uint8_t)0x02) /*!< TIM1 Alternate Function mapping */
549+
550+
/**
551+
* @brief AF 3 selection
552+
*/
553+
#define GPIO_AF3_TIM1 ((uint8_t)0x03) /*!< TIM1 Alternate Function mapping */
554+
555+
/**
556+
* @brief AF 4 selection
557+
*/
558+
#define GPIO_AF4_I2C1 ((uint8_t)0x04) /*!< I2C1 Alternate Function mapping */
559+
#define GPIO_AF4_SPI1 ((uint8_t)0x04) /*!< SPI1 Alternate Function mapping */
560+
561+
/**
562+
* @brief AF 5 selection
563+
*/
564+
#define GPIO_AF5_SPI1 ((uint8_t)0x05) /*!< SPI1 Alternate Function mapping */
565+
566+
/**
567+
* @brief AF 6 selection
568+
*/
569+
#define GPIO_AF6_MCO ((uint8_t)0x06) /*!< MCO Alternate Function mapping */
570+
#define GPIO_AF6_RF_DTB0 ((uint8_t)0x06) /*!< RF_DTB0 Alternate Function mapping */
571+
#define GPIO_AF6_RF_DTB1 ((uint8_t)0x06) /*!< RF_DTB1 Alternate Function mapping */
572+
#define GPIO_AF6_RF_DTB2 ((uint8_t)0x06) /*!< RF_DTB2 Alternate Function mapping */
573+
#define GPIO_AF6_RF_DTB3 ((uint8_t)0x06) /*!< RF_DTB3 Alternate Function mapping */
574+
#define GPIO_AF6_RF_DTB4 ((uint8_t)0x06) /*!< RF_DTB4 Alternate Function mapping */
575+
#define GPIO_AF6_RF_DTB5 ((uint8_t)0x06) /*!< RF_DTB5 Alternate Function mapping */
576+
#define GPIO_AF6_RF_DTB6 ((uint8_t)0x06) /*!< RF_DTB6 Alternate Function mapping */
577+
#define GPIO_AF6_RF_DTB7 ((uint8_t)0x06) /*!< RF_DTB7 Alternate Function mapping */
578+
#define GPIO_AF6_RF_DTB8 ((uint8_t)0x06) /*!< RF_DTB8 Alternate Function mapping */
579+
#define GPIO_AF6_RF_DTB9 ((uint8_t)0x06) /*!< RF_DTB9 Alternate Function mapping */
580+
#define GPIO_AF6_RF_DTB10 ((uint8_t)0x06) /*!< RF_DTB10 Alternate Function mapping */
581+
#define GPIO_AF6_RF_DTB11 ((uint8_t)0x06) /*!< RF_DTB11 Alternate Function mapping */
582+
#define GPIO_AF6_RF_DTB12 ((uint8_t)0x06) /*!< RF_DTB12 Alternate Function mapping */
583+
#define GPIO_AF6_RF_DTB13 ((uint8_t)0x06) /*!< RF_DTB13 Alternate Function mapping */
584+
#define GPIO_AF6_RF_DTB14 ((uint8_t)0x06) /*!< RF_DTB14 Alternate Function mapping */
585+
#define GPIO_AF6_RF_DTB15 ((uint8_t)0x06) /*!< RF_DTB15 Alternate Function mapping */
586+
#define GPIO_AF6_RF_DTB16 ((uint8_t)0x06) /*!< RF_DTB16 Alternate Function mapping */
587+
#define GPIO_AF6_RF_DTB17 ((uint8_t)0x06) /*!< RF_DTB17 Alternate Function mapping */
588+
#define GPIO_AF6_RF_DTB18 ((uint8_t)0x06) /*!< RF_DTB18 Alternate Function mapping */
589+
#define GPIO_AF6_RF_MISO ((uint8_t)0x06) /*!< RF_MISO Alternate Function mapping */
590+
#define GPIO_AF6_RF_MOSI ((uint8_t)0x06) /*!< RF_MOSI Alternate Function mapping */
591+
#define GPIO_AF6_RF_SCK ((uint8_t)0x06) /*!< RF_SCK Alternate Function mapping */
592+
#define GPIO_AF6_RF_NSS ((uint8_t)0x06) /*!< RF_NSS Alternate Function mapping */
593+
/**
594+
* @brief AF 7 selection
595+
*/
596+
#define GPIO_AF7_USART1 ((uint8_t)0x07) /*!< USART1 Alternate Function mapping */
597+
598+
/**
599+
* @brief AF 8 selection
600+
*/
601+
#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /*!< LPUART1 Alternate Function mapping */
602+
603+
/**
604+
* @brief AF 9 selection
605+
*/
606+
#define GPIO_AF9_TSC ((uint8_t)0x09) /*!< TSC Alternate Function mapping */
607+
608+
/**
609+
* @brief AF 12 selection
610+
*/
611+
#define GPIO_AF12_COMP1 ((uint8_t)0x0c) /*!< COMP1 Alternate Function mapping */
612+
#define GPIO_AF12_TIM1 ((uint8_t)0x0c) /*!< TIM1 Alternate Function mapping */
613+
614+
/**
615+
* @brief AF 14 selection
616+
*/
617+
#define GPIO_AF14_TIM2 ((uint8_t)0x0e) /*!< TIM2 Alternate Function mapping */
618+
#define GPIO_AF14_LPTIM2 ((uint8_t)0x0e) /*!< LPTIM2 Alternate Function mapping */
619+
620+
621+
/**
622+
* @brief AF 15 selection
623+
*/
624+
#define GPIO_AF15_EVENTOUT ((uint8_t)0x0f) /*!< EVENTOUT Alternate Function mapping */
625+
626+
#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0f)
627+
#endif
524628

525629
/**
526630
* @}

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